From WikiChip
Difference between revisions of "intel/cores/ice lake sp"
< intel

Line 17: Line 17:
 
|successor link=intel/cores/sapphire rapids sp
 
|successor link=intel/cores/sapphire rapids sp
 
}}
 
}}
'''Ice Lake SP''' ('''{{intel|Ice Lake|l=arch}} Scalable Performance''') is the code name for Intel's series of server [[multiprocessors]] based on the {{intel|Ice Lake (server)|Ice Lake|l=arch}} microarchitecture as part of the {{intel|?|l=platform}} platform serving as the successor to {{intel|Cascade Lake SP|l=core}}.
+
'''Ice Lake SP''' ('''{{intel|Ice Lake|l=arch}} Scalable Performance''') is the code name for Intel's series of server [[multiprocessors]] based on the {{intel|Ice Lake (server)|Ice Lake|l=arch}} microarchitecture as part of the {{intel|Whitley|l=platform}} platform serving as the successor to {{intel|Cascade Lake SP|l=core}}.
  
  
 
{{future information}}
 
{{future information}}

Revision as of 17:29, 9 April 2018

Edit Values
Ice Lake SP
General Info
DesignerIntel
ManufacturerIntel
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureIce Lake (server)
Word Size
8 octets
16 nibbles
64 bit
Process10 nm
0.01 μm
1.0e-5 mm
TechnologyCMOS
Packaging
Template:packages/intel/fclga-4189
Succession

Ice Lake SP (Ice Lake Scalable Performance) is the code name for Intel's series of server multiprocessors based on the Ice Lake microarchitecture as part of the Whitley platform serving as the successor to Cascade Lake SP.


Symbol version future.svg Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release.
designerIntel +
instance ofcore +
isax86-64 +
isa familyx86 +
manufacturerIntel +
microarchitectureIce Lake (server) +
nameIce Lake SP +
packageFCLGA-4189 +
platformWhitley +
process10 nm (0.01 μm, 1.0e-5 mm) +
socketSocket W + and LGA-4189 +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +