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Difference between revisions of "ampere computing/microarchitectures/quicksilver"
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'''Quicksilver''' is [[ampere computing|Ampere]]'s successor to {{apm|Skylark|l=arch}}, a planned [[7 nm]] [[ARM]] microarchitecture for servers.
 
'''Quicksilver''' is [[ampere computing|Ampere]]'s successor to {{apm|Skylark|l=arch}}, a planned [[7 nm]] [[ARM]] microarchitecture for servers.
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== Release Dates ==
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Quicksilver is planned to be launched sometimes in 2019.
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== Technology ==
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Quicksilver will be fabricated on [[TSMC]]'s [[7 nm process]].
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== Architecture ==
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=== Key changes from {{apm|Skylark|l=arch}} ===
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* [[7 nm process]] (from [[16 nm]])
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* Higher [[IPC]]
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* Higher core count (from [[32-core]])
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* ARMv8.2 support (from ARMv8)
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* Multi-socket support
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* Faster memory (3200 MT/s from 2666 MT/s)
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* PCIe 4.0 support (from 3.0)
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* [[CCIX]] connectivity support

Revision as of 03:02, 9 February 2018

Edit Values
Quicksilver µarch
General Info
Arch TypeCPU
DesignerAmpere Computing
ManufacturerTSMC
Introduction2019
Process7 nm
Pipeline
TypeSuperscalar
OoOEYes
SpeculativeYes
Reg RenamingYes
Instructions
ISAARMv8.2
Succession

Quicksilver is Ampere's successor to Skylark, a planned 7 nm ARM microarchitecture for servers.

Release Dates

Quicksilver is planned to be launched sometimes in 2019.

Technology

Quicksilver will be fabricated on TSMC's 7 nm process.

Architecture

Key changes from Skylark

  • 7 nm process (from 16 nm)
  • Higher IPC
  • Higher core count (from 32-core)
  • ARMv8.2 support (from ARMv8)
  • Multi-socket support
  • Faster memory (3200 MT/s from 2666 MT/s)
  • PCIe 4.0 support (from 3.0)
  • CCIX connectivity support
codenameQuicksilver +
designerAmpere Computing +
first launched2019 +
full page nameampere computing/microarchitectures/quicksilver +
instance ofmicroarchitecture +
instruction set architectureARMv8.2 +
manufacturerTSMC +
microarchitecture typeCPU +
nameQuicksilver +
process7 nm (0.007 μm, 7.0e-6 mm) +