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Difference between revisions of "intel/xeon d/d-2161i"
< intel‎ | xeon d

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|package module 1={{packages/intel/fcbga-2518}}
 
|package module 1={{packages/intel/fcbga-2518}}
 
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'''Xeon D-2161I''' is a {{arch|64}} [[dodeca-core]] high-performance [[x86]] microserver processor set to be introduced by [[Intel]] in early [[2018]]. Fabricated on Intel's [[14 nm process|14nm+ process]] based on the {{intel|Skylake (server)|l=arch|Skylake microarchitecture}}, this chip operates at 2.2 GHz with a [[TDP]] of 90 W.
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'''Xeon D-2161I''' is a {{arch|64}} [[12-core]] high-performance [[x86]] server microprocessor introduced by [[Intel]] in early 2018 for the dense server and [[edge computing]] market segment. Fabricated on Intel's [[14 nm process]] based on the {{intel|Skylake (server)|Skylake|l=arch}} microarchitecture, this model operates at 2.2 GHz with a {{intel|Turbo Boost}} of up to 3.0 GHz and a [[TDP]] of 90 W. The D-2161I supports up to 512 GiB of quad-chanel DDR4-2133 ECC memory.
  
  
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|l3 policy=write-back
 
|l3 policy=write-back
 
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== Memory controller ==
 
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{{memory controller
 
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|type=DDR4-2666
 
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|ecc=Yes
 
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|max mem=512 GiB
 
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|controllers=2
 
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|channels=4
 
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|max bandwidth=79.47 GiB/s
 
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|bandwidth schan=19.87 GiB/s
 
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|bandwidth dchan=39.74 GiB/s
 
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|bandwidth qchan=79.47 GiB/s
 
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}}
 
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== Expansions ==
 
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{{expansions main
 
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|
 
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{{expansions entry
 
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|type=PCIe
 
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|pcie revision=3.0
 
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|pcie lanes=48
 
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|pcie config=x16
 
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|pcie config 2=x8
 
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|pcie config 3=x4
 
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}}
 
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}}
 
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== Features ==
 
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{{x86 features
 
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|real=Yes
 
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|protected=Yes
 
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|smm=Yes
 
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|fpu=Yes
 
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|x8616=Yes
 
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|x8632=Yes
 
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|x8664=Yes
 
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|nx=Yes
 
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|mmx=Yes
 
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|emmx=Yes
 
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|sse=Yes
 
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|sse2=Yes
 
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|sse3=Yes
 
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|ssse3=Yes
 
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|sse41=Yes
 
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|sse42=Yes
 
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|sse4a=No
 
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|avx=Yes
 
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|avx2=Yes
 
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|avx512f=Yes
 
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|avx512cd=Yes
 
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|avx512er=No
 
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|avx512pf=No
 
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|avx512bw=Yes
 
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|avx512dq=Yes
 
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|avx512vl=Yes
 
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|avx512ifma=No
 
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|avx512vbmi=No
 
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|avx5124fmaps=No
 
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|avx5124vnniw=No
 
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|avx512vpopcntdq=No
 
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|avx512units=2
 
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|abm=Yes
 
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|tbm=No
 
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|bmi1=Yes
 
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|bmi2=Yes
 
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|fma3=Yes
 
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|fma4=No
 
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|aes=Yes
 
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|rdrand=Yes
 
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|sha=No
 
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|xop=No
 
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|adx=Yes
 
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|clmul=Yes
 
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|f16c=Yes
 
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|tbt1=No
 
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|tbt2=Yes
 
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|tbmt3=No
 
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|bpt=No
 
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|eist=Yes
 
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|sst=Yes
 
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|flex=No
 
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|fastmem=No
 
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|ivmd=Yes
 
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|intelnodecontroller=No
 
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|intelnode=No
 
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|kpt=No
 
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|ptt=No
 
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|intelrunsure=No
 
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|mbe=No
 
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|isrt=No
 
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|sba=No
 
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|mwt=No
 
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|sipp=No
 
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|att=No
 
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|ipt=Yes
 
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|tsx=Yes
 
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|txt=Yes
 
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|ht=Yes
 
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|vpro=Yes
 
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|vtx=Yes
 
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|vtd=Yes
 
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|ept=Yes
 
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|mpx=Yes
 
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|sgx=No
 
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|securekey=Yes
 
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|osguard=Yes
 
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|intqat=No
 
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|3dnow=No
 
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|e3dnow=No
 
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|smartmp=No
 
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|powernow=No
 
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|amdvi=No
 
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|amdv=No
 
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|amdsme=No
 
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|amdtsme=No
 
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|amdsev=No
 
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|rvi=No
 
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|smt=No
 
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|sensemi=No
 
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|xfr=No
 
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}}
 
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'''Xeon D-2161I''' is a {{arch|64}} [[12-core]] high-performance [[x86]] server microprocessor introduced by [[Intel]] in early 2018 for the dense server and [[edge computing]] market segment. Fabricated on Intel's [[14 nm process]] based on the {{intel|Skylake (server)|Skylake|l=arch}} microarchitecture, this model operates at 2.2 GHz with a {{intel|Turbo Boost}} of up to 3.0 GHz and a [[TDP]] of 90 W. The D-2161I supports up to 512 GiB of quad-chanel DDR4-2133 ECC memory.
 
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{{unknown features}}
 

Revision as of 14:56, 7 February 2018

Edit Values
Xeon D-2161I
skylake-de (front).png
General Info
DesignerIntel
ManufacturerIntel
Model NumberD-2161I
Part NumberFH8067303534104
S-SpecSR3ZN
MarketServer, Embedded
IntroductionFebruary 7, 2018 (announced)
February 7, 2018 (launched)
Release Price$962.00
ShopAmazon
General Specs
FamilyXeon D
SeriesD-2000
LockedYes
Frequency2,200 MHz
Turbo Frequency3,000 MHz (1 core)
Bus typeDMI 3.0
Bus rate4 × 8 GT/s
Clock multiplier22
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureSkylake (server)
Core NameSkylake-DE
Core SteppingM1
Process14 nm
TechnologyCMOS
MCPYes (2 dies)
Word Size64 bit
Cores12
Threads24
Max Memory512 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP90 W
Packaging
PackageFCBGA-2518 (BGA)
Dimension45 mm x 52.5 mm
Contacts2518

Xeon D-2161I is a 64-bit 12-core high-performance x86 server microprocessor introduced by Intel in early 2018 for the dense server and edge computing market segment. Fabricated on Intel's 14 nm process based on the Skylake microarchitecture, this model operates at 2.2 GHz with a Turbo Boost of up to 3.0 GHz and a TDP of 90 W. The D-2161I supports up to 512 GiB of quad-chanel DDR4-2133 ECC memory.


DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.


Cache

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$768 KiB
786,432 B
0.75 MiB
L1I$384 KiB
393,216 B
0.375 MiB
12x32 KiB8-way set associative 
L1D$384 KiB
393,216 B
0.375 MiB
12x32 KiB8-way set associativewrite-back
L2$12 MiB
12,288 KiB
12,582,912 B
0.0117 GiB
  12x1 MiB16-way set associativewrite-back
L3$16.5 MiB
16,896 KiB
17,301,504 B
0.0161 GiB
  12x1.375 MiB11-way set associativewrite-back
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Facts about "Xeon D-2161I - Intel"
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Xeon D-2161I - Intel#package +
base frequency2,200 MHz (2.2 GHz, 2,200,000 kHz) +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus typeDMI 3.0 +
clock multiplier22 +
core count12 +
core nameSkylake-DE +
core steppingM1 +
designerIntel +
die count2 +
familyXeon D +
first announcedFebruary 7, 2018 +
first launchedFebruary 7, 2018 +
full page nameintel/xeon d/d-2161i +
has locked clock multipliertrue +
instance ofmicroprocessor +
is multi-chip packagetrue +
isax86-64 +
isa familyx86 +
l1$ size768 KiB (786,432 B, 0.75 MiB) +
l1d$ description8-way set associative +
l1d$ size384 KiB (393,216 B, 0.375 MiB) +
l1i$ description8-way set associative +
l1i$ size384 KiB (393,216 B, 0.375 MiB) +
l2$ description16-way set associative +
l2$ size12 MiB (12,288 KiB, 12,582,912 B, 0.0117 GiB) +
l3$ description11-way set associative +
l3$ size16.5 MiB (16,896 KiB, 17,301,504 B, 0.0161 GiB) +
ldateFebruary 7, 2018 +
main imageFile:skylake-de (front).png +
manufacturerIntel +
market segmentServer + and Embedded +
max cpu count1 +
max memory524,288 MiB (536,870,912 KiB, 549,755,813,888 B, 512 GiB, 0.5 TiB) +
microarchitectureSkylake (server) +
model numberD-2161I +
nameXeon D-2161I +
packageFCBGA-2518 +
part numberFH8067303534104 +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 962.00 (€ 865.80, £ 779.22, ¥ 99,403.46) +
s-specSR3ZN +
seriesD-2000 +
smp max ways1 +
tdp90 W (90,000 mW, 0.121 hp, 0.09 kW) +
technologyCMOS +
thread count24 +
turbo frequency (1 core)3,000 MHz (3 GHz, 3,000,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +