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Difference between revisions of "samsung/microarchitectures/m3"
< samsung

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|decode=6-way
 
|decode=6-way
 
|isa=ARMv8
 
|isa=ARMv8
|l1i=64 KiB
 
|l1i per=core
 
|l1i desc=4-way set associative
 
|l1d=32 KiB
 
|l1d per=core
 
|l1d desc=8-way set associative
 
|l2=2 MiB
 
|l2 per=cluster
 
|l2 desc=16-way set associative
 
 
|predecessor=Mongoose 2
 
|predecessor=Mongoose 2
 
|predecessor link=samsung/microarchitectures/mongoose_2
 
|predecessor link=samsung/microarchitectures/mongoose_2
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{{expand list}}
 
{{expand list}}
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=== Memory Hierarchy ===
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{{empty section}}
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== Core ==
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{{empty section}}
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== All M3 Processors ==
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          This table is generated automatically from the data in the actual articles.
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          If a microprocessor is missing from the list, an appropriate article for it needs to be
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          created and tagged accordingly.
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          Missing a chip? please dump its name here: https://en.wikichip.org/wiki/WikiChip:wanted_chips
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{{comp table start}}
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<table class="comptable sortable tc5 tc6 tc7">
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{{comp table header|main|8:List of M3-based Processors}}
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{{comp table header|main|6:Main processor|2:Integrated Graphics}}
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{{comp table header|cols|Family|Launched|Arch|Cores|%Frequency|%Turbo|GPU|%Frequency}}
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{{#ask: [[Category:microprocessor models by samsung]] [[microarchitecture::Mongoose 3]]
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|?full page name
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|?model number
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|?family
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|?first launched
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|?microarchitecture
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|?core count
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|?base frequency#GHz
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|?turbo frequency (1 core)#GHz
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|?integrated gpu
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|?integrated gpu base frequency
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|format=template
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|template=proc table 3
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|userparam=10
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|mainlabel=-
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|valuesep=,
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}}
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{{comp table count|ask=[[Category:microprocessor models by samsung]] [[microarchitecture::Mongoose 3]]}}
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</table>
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{{comp table end}}
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== References ==
 
== References ==
 
* LLVM: lib/Target/AArch64/AArch64SchedExynosM3.td
 
* LLVM: lib/Target/AArch64/AArch64SchedExynosM3.td

Revision as of 02:46, 5 February 2018

Edit Values
Mongoose 3 µarch
General Info
Arch TypeCPU
DesignerSamsung
ManufacturerSamsung
Introduction2018
Process10 nm
Core Configs4
Pipeline
OoOEYes
SpeculativeYes
Reg RenamingYes
Decode6-way
Instructions
ISAARMv8
Succession

Mongoose 3 (M3) is an ARM microarchitecture designed by Samsung for their consumer electronics serving as a successor to the Mongoose 2.

Process Technology

The M3 was fabricated on Samsung's second generation 10LPP (Low Power Plus) process.

Compiler support

Compiler Arch-Specific Arch-Favorable
GCC -march=armv8-a+crypto -mtune=exynos-m3

Architecture

Symbol version future.svg Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release.

Key changes from Mongoose 1/M2

  • 10nm 10LPP process (from 1st gen 10LPP)
  • Core
    • Front-end
      • larger instruction queue (40 entries, up from 24)
      • 6-way decode (from 4)
      • µOP fusion
        • Can fuse address generation and memory operations
        • Can fuse literal generation operations
    • Back-end
      • larger ReOrder buffer (228 entries, from 96 entries)
      • Has a fastpath logical shift of up to 3 places
  • branch misprediction penalty increased (16, from 14)

This list is incomplete; you can help by expanding it.

Memory Hierarchy

New text document.svg This section is empty; you can help add the missing info by editing this page.

Core

New text document.svg This section is empty; you can help add the missing info by editing this page.

All M3 Processors

 List of M3-based Processors
 Main processorIntegrated Graphics
ModelFamilyLaunchedArchCoresFrequencyTurboGPUFrequency
Count: 0


References

  • LLVM: lib/Target/AArch64/AArch64SchedExynosM3.td
codenameMongoose 3 +
core count4 +
designerSamsung +
first launched2018 +
full page namesamsung/microarchitectures/m3 +
instance ofmicroarchitecture +
instruction set architectureARMv8 +
manufacturerSamsung +
microarchitecture typeCPU +
nameMongoose 3 +
process10 nm (0.01 μm, 1.0e-5 mm) +