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Difference between revisions of "samsung/microarchitectures/m1"
< samsung

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== History ==
 
== History ==
 
The Mongoose 1 (M1) microarchitecture was Samsung's first in-house design which was done entirely from scratch. A design team was assembled and in roughly 3 years, they've gone from requirements to [[tape-out]]. The design was done at Samsung's Austin R&D Center (SARC) which was founded in [[2010]] for the sole purpose of developing high-performance, low-power, complex CPU and System IPs. A large portion of the design team consists of many ex-[[AMD]] Austin engineers as well as ex-[[IBM]]ers.
 
The Mongoose 1 (M1) microarchitecture was Samsung's first in-house design which was done entirely from scratch. A design team was assembled and in roughly 3 years, they've gone from requirements to [[tape-out]]. The design was done at Samsung's Austin R&D Center (SARC) which was founded in [[2010]] for the sole purpose of developing high-performance, low-power, complex CPU and System IPs. A large portion of the design team consists of many ex-[[AMD]] Austin engineers as well as ex-[[IBM]]ers.
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== Process Technology ==
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== Architecture ==
 
== Architecture ==
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** Multistride/multistream prefetcher
 
** Multistride/multistream prefetcher
 
** Low-latency and low-power caches
 
** Low-latency and low-power caches
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=== Block Diagram ===
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==== Entire SoC Overview ====
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==== Individual Core ====
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=== Memory Hierarchy ===
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== Overview ==
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== Core ==
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== Die ==
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Revision as of 01:15, 27 January 2018

Edit Values
Mongoose 1 µarch
General Info
Arch TypeCPU
DesignerSamsung
ManufacturerSamsung
Process14 nm
Succession

Mongoose 1 (M1) is an ARM microarchitecture designed by Samsung for their consumer electronics. This was Samsung's first in-house developed microarchitecture.

History

The Mongoose 1 (M1) microarchitecture was Samsung's first in-house design which was done entirely from scratch. A design team was assembled and in roughly 3 years, they've gone from requirements to tape-out. The design was done at Samsung's Austin R&D Center (SARC) which was founded in 2010 for the sole purpose of developing high-performance, low-power, complex CPU and System IPs. A large portion of the design team consists of many ex-AMD Austin engineers as well as ex-IBMers.

Process Technology

New text document.svg This section is empty; you can help add the missing info by editing this page.

Architecture

The M1 is Samsung's first in-house design from scratch.

  • ARM v8.0
  • 2.6 GHz clock frequency
    • 2.3 GHz for multi-core workloads
  • Sub 3-watt/core
  • 14 nm process (FinFET)
  • Core
    • Advanced branch predictor
    • 4-way instruction decode
      • Most instructions map to a single µOP, with a few exceptions
    • 4-way µOP dispatch and retire
    • Out-of-order execution
      • Out-of-order load and stores
    • Multistride/multistream prefetcher
    • Low-latency and low-power caches

Block Diagram

Entire SoC Overview

New text document.svg This section is empty; you can help add the missing info by editing this page.

Individual Core

New text document.svg This section is empty; you can help add the missing info by editing this page.

Memory Hierarchy

New text document.svg This section is empty; you can help add the missing info by editing this page.

Overview

New text document.svg This section is empty; you can help add the missing info by editing this page.

Core

New text document.svg This section is empty; you can help add the missing info by editing this page.

Die

New text document.svg This section is empty; you can help add the missing info by editing this page.
codenameMongoose 1 +
designerSamsung +
full page namesamsung/microarchitectures/m1 +
instance ofmicroarchitecture +
manufacturerSamsung +
microarchitecture typeCPU +
nameMongoose 1 +
process14 nm (0.014 μm, 1.4e-5 mm) +