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Difference between revisions of "via technologies/microarchitectures/samuel 2"
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|atype=CPU | |atype=CPU | ||
|name=Samuel 2 | |name=Samuel 2 | ||
| − | |designer= | + | |designer=VIA Technologies |
|manufacturer=TSMC | |manufacturer=TSMC | ||
|process=0.150 µm | |process=0.150 µm | ||
Latest revision as of 21:17, 14 January 2018
| Edit Values | |
| Samuel 2 µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | VIA Technologies |
| Manufacturer | TSMC |
| Process | 0.150 µm |
| Core Configs | 1 |
| Pipeline | |
| Stages | 12 |
| Instructions | |
| ISA | x86-32 |
| Succession | |
Samuel 2 is the successor to Samuel, an x86 microarchitecture designed by VIA Technologies for low power devices.
Facts about "Samuel 2 - Microarchitectures - VIA Technologies"
| codename | Samuel 2 + |
| core count | 1 + |
| designer | Centaur Technology + |
| full page name | via technologies/microarchitectures/samuel 2 + |
| instance of | microarchitecture + |
| instruction set architecture | x86-32 + |
| manufacturer | TSMC + |
| microarchitecture type | CPU + |
| name | Samuel 2 + |
| pipeline stages | 12 + |
| process | 150 nm (0.15 μm, 1.5e-4 mm) + |