From WikiChip
Difference between revisions of "esperanto/microarchitectures/et-maxion"
< esperanto

Line 8: Line 8:
 
|process=7 nm
 
|process=7 nm
 
|type=Superscalar
 
|type=Superscalar
|type 2=Pipelined
+
|type 2=Superpipeline
|oooe=No
+
|oooe=Yes
 
|speculative=Yes
 
|speculative=Yes
|renaming=No
+
|renaming=Yes
 
|isa=RV64
 
|isa=RV64
 
|extension=I
 
|extension=I
Line 19: Line 19:
 
|extension 5=D
 
|extension 5=D
 
|extension 6=C
 
|extension 6=C
 +
|predecessor=BOOM v2
 +
|predecessor link=uc berkeley/microarchitectures/boom v2
 
|contemporary=ET-Minion
 
|contemporary=ET-Minion
 
|contemporary link=esperanto/microarchitectures/et-minion
 
|contemporary link=esperanto/microarchitectures/et-minion
 
}}
 
}}

Revision as of 20:24, 25 December 2017

Edit Values
ET-Maxion µarch
General Info
Arch TypeCPU
DesignerEsperanto
ManufacturerTSMC
Introduction2018
Process7 nm
Pipeline
TypeSuperscalar, Superpipeline
OoOEYes
SpeculativeYes
Reg RenamingYes
Instructions
ISARV64
ExtensionsI, M, A, F, D, C
Succession
Contemporary
ET-Minion
codenameET-Maxion +
designerEsperanto +
first launched2018 +
full page nameesperanto/microarchitectures/et-maxion +
instance ofmicroarchitecture +
instruction set architectureRV64 +
manufacturerTSMC +
microarchitecture typeCPU +
nameET-Maxion +
process7 nm (0.007 μm, 7.0e-6 mm) +