From WikiChip
Difference between revisions of "intel/microarchitectures/knights peak"
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No architectural details were ever disclosed by Intel. | No architectural details were ever disclosed by Intel. | ||
− | === Key changes from {{\\|Knights | + | === Key changes from {{\\|Knights Hill}} === |
* [[7 nm]] (from [[10 nm]]) | * [[7 nm]] (from [[10 nm]]) |
Revision as of 00:36, 19 December 2017
Edit Values | |
Knights Peak µarch | |
General Info | |
Arch Type | CPU |
Designer | Intel |
Manufacturer | Intel |
Process | 7 nm |
Pipeline | |
Type | Superscalar |
OoOE | Yes |
Speculative | Yes |
Reg Renaming | Yes |
Instructions | |
ISA | x86-16, x86-32, x86-64 |
Succession | |
Knights Peak (KNP) was Intel's planned successor to Knights Hill, a 7 nm many-core microarchitecture for research and supercomputers.
History
Knights Peak was planned to succeed Knights Hill sometimes around 2020. With the cancellation of Knights Hill, Knights Peak was also consequently cancelled.
Brands
Knights Peak was planned to be branded as 4th generation Xeon Phi
Process Technology
Knights Peak was intended to be fabricated on Intel's 7 nm process.
Architecture
No architectural details were ever disclosed by Intel.
Key changes from Knights Hill
Facts about "Knights Peak - Microarchitectures - Intel"
codename | Knights Peak + |
designer | Intel + |
full page name | intel/microarchitectures/knights peak + |
instance of | microarchitecture + |
instruction set architecture | x86-16 +, x86-32 + and x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Knights Peak + |
process | 7 nm (0.007 μm, 7.0e-6 mm) + |