From WikiChip
Difference between revisions of "intel/core i5/i5-9500"
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Revision as of 16:21, 13 December 2017
Edit Values | |
Core i5-9500 | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | i5-9500 |
Market | Desktop |
Shop | Amazon |
General Specs | |
Family | Core i5 |
Series | i5-9000 |
Locked | Yes |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Ice Lake |
Core Name | Ice Lake S |
Process | 10 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 6 |
Threads | 12 |
Max Memory | 64 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 65 W |
Core i5-9500 is a planned 64-bit mid-range performance x86 desktop processor by Intel set to be introduced in 2018/2019. The i5-9400 is fabricated on Intel's 2nd generation 10nm+ process based on the Ice Lake microarchitecture.
Cache
- Main article: Ice Lake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Facts about "Core i5-9500 - Intel"
core count | 6 + |
core name | Ice Lake S + |
designer | Intel + |
family | Core i5 + |
full page name | intel/core i5/i5-9500 + |
has locked clock multiplier | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 12 MiB (12,288 KiB, 12,582,912 B, 0.0117 GiB) + |
ldate | 3000 + |
manufacturer | Intel + |
market segment | Desktop + |
max cpu count | 1 + |
max memory | 65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) + |
microarchitecture | Ice Lake + |
model number | i5-9500 + |
name | Core i5-9500 + |
process | 10 nm (0.01 μm, 1.0e-5 mm) + |
series | i5-9000 + |
smp max ways | 1 + |
tdp | 65 W (65,000 mW, 0.0872 hp, 0.065 kW) + |
technology | CMOS + |
thread count | 12 + |
word size | 64 bit (8 octets, 16 nibbles) + |