Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "freescale/qoriq/p1014"
m (Bot: moving all {{mpu}} to {{chip}}) |
|||
| Line 1: | Line 1: | ||
{{freescale title|QorIQ P1014}} | {{freescale title|QorIQ P1014}} | ||
| − | {{ | + | {{chip |
|name=QorIQ P1014 | |name=QorIQ P1014 | ||
|image=qoriq p1014.png | |image=qoriq p1014.png | ||
Latest revision as of 15:13, 13 December 2017
| Edit Values | |||||||||
| QorIQ P1014 | |||||||||
 | |||||||||
| General Info | |||||||||
| Designer | Freescale | ||||||||
| Manufacturer | IBM | ||||||||
| Model Number | P1014 | ||||||||
| Market | Networking, Embedded | ||||||||
| Introduction | 2010 (announced) 2011 (launched) | ||||||||
| General Specs | |||||||||
| Family | QorIQ | ||||||||
| Series | P1 | ||||||||
| Frequency | 800 MHz | ||||||||
| Microarchitecture | |||||||||
| ISA | Power ISA v2.03 (Power) | ||||||||
| Microarchitecture | e500 | ||||||||
| Core Name | e500 v2 | ||||||||
| Process | 45 nm | ||||||||
| Technology | CMOS | ||||||||
| Word Size | 32 bit | ||||||||
| Cores | 1 | ||||||||
| Threads | 1 | ||||||||
| Electrical | |||||||||
| Power dissipation | 1.13 W | ||||||||
| Tjunction | 0 °C – 125 °C | ||||||||
| Packaging | |||||||||
| |||||||||
| |||||||||
QorIQ P1014 is a 32-bit embedded POWER microprocessor introduced by Freescale in 2008. This networking/embedded processor, which is based on the e500 microarchitecture and is fabricated on a 45 nm SOI process, operates at 800 MHz and supports 16-bit DDR3-800 memory.
Cache[edit]
- Main article: e500 § Cache
 |
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
||||||||||||||||||||||||
|
|||||||||||||||||||||||||
Memory controller[edit]
 |
Integrated Memory Controller
|
|||||||||||||
|
||||||||||||||
Expansions[edit]
- 2x 10/100/1000 Eithernet with SGMII
- 2x PCIe 1.0a controllers with 2 SerDes
Block Diagram[edit]
Facts about "QorIQ P1014 - Freescale"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | QorIQ P1014 - Freescale#package + |
| base frequency | 800 MHz (0.8 GHz, 800,000 kHz) + |
| core count | 1 + |
| core name | e500 v2 + |
| designer | Freescale + |
| family | QorIQ + |
| first announced | 2010 + |
| first launched | 2011 + |
| full page name | freescale/qoriq/p1014 + |
| has ecc memory support | true + |
| instance of | microprocessor + |
| isa | Power ISA v2.03 + |
| isa family | Power + |
| l1$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
| l2$ description | 8-way set associative + |
| l2$ size | 0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) + |
| ldate | 2011 + |
| main image |  + |
| manufacturer | IBM + |
| market segment | Networking + and Embedded + |
| max junction temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
| max memory bandwidth | 1.49 GiB/s (1,525.76 MiB/s, 1.6 GB/s, 1,599.875 MB/s, 0.00146 TiB/s, 0.0016 TB/s) + |
| max memory channels | 1 + |
| microarchitecture | e500 + |
| min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
| model number | P1014 + |
| name | QorIQ P1014 + |
| package | TE-PBGA-II-689 + and TE-PBGA-425 + |
| power dissipation | 1.13 W (1,130 mW, 0.00152 hp, 0.00113 kW) + |
| process | 45 nm (0.045 μm, 4.5e-5 mm) + |
| series | P1 + |
| supported memory type | DDR3-800 + |
| technology | CMOS + |
| thread count | 1 + |
| word size | 32 bit (4 octets, 8 nibbles) + |
