From WikiChip
Difference between revisions of "amd/duron/d600aut1b"
< amd‎ | duron

m (Bot: corrected param)
m (Bot: switching template from {{mpu}} to a more generic {{chip}})
Line 1: Line 1:
 
{{amd title|Duron 600 (Spitfire)}}
 
{{amd title|Duron 600 (Spitfire)}}
{{mpu
+
{{chip
 
| name                = Duron 600
 
| name                = Duron 600
 
| no image            =  
 
| no image            =  
Line 106: Line 106:
  
 
== Features ==  
 
== Features ==  
{{mpu features
+
{{chip features
 
| em64t      =  
 
| em64t      =  
 
| nx          =  
 
| nx          =  

Revision as of 14:20, 13 December 2017

Edit Values
Duron 600
KL AMD Duron Spitfire.jpg
General Info
DesignerAMD
ManufacturerAMD
Model NumberDuron 600
Part NumberD600AUT1B,
D0600AUT1B
MarketDesktop
IntroductionJune 5, 2000 (announced)
June 19, 2000 (launched)
ShopAmazon
General Specs
FamilyDuron
SeriesDuron Desktop
LockedYes
Frequency600 MHz
Bus typeFSB
Bus speed100 MHz
Bus rate200 MT/s
Clock multiplier6
CPUID630
Microarchitecture
MicroarchitectureK7
Core NameSpitfire
Core Family6
Core Model3
Core Stepping0
Process180 nm
Transistors25,000,000
TechnologyCMOS
Die100 mm²
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore1.6 V ± 0.1 V
TDP27.4 W
Tcase0 °C – 90 °C
Tstorage-40 °C – 100 °C

Duron 600 based on the Spitfire core was a 32-bit x86 microprocessor developed by AMD and introduced in 2000. This model was part of the first series of the Duron family. Designed based on AMD's K7 (a Thunderbird-derivative) on a 180 nm process, this MPU operated at 550 MHz with a bus capable of 200 MT/s with a typical TDP of 27.4 W.

Cache

Main article: K7 § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L1D$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L2$ 64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
1x64 KiB 16-way set associative

Graphics

This SoC has no integrated graphics processing unit.

Features

Template:chip features

  • Halt State
  • Sleep State

Documents

DataSheet

Other

Gallery

base frequency600 MHz (0.6 GHz, 600,000 kHz) +
bus rate200 MT/s (0.2 GT/s, 200,000 kT/s) +
bus speed100 MHz (0.1 GHz, 100,000 kHz) +
bus typeFSB +
clock multiplier6 +
core count1 +
core family6 +
core model3 +
core nameSpitfire +
core stepping0 +
core voltage1.6 V (16 dV, 160 cV, 1,600 mV) +
core voltage tolerance0.1 V +
cpuid630 +
designerAMD +
die area100 mm² (0.155 in², 1 cm², 100,000,000 µm²) +
familyDuron +
first announcedJune 5, 2000 +
first launchedJune 19, 2000 +
full page nameamd/duron/d600aut1b +
has featureHalt State + and Sleep State +
has locked clock multipliertrue +
instance ofmicroprocessor +
l1d$ description2-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +
ldateJune 19, 2000 +
main imageFile:KL AMD Duron Spitfire.jpg +
manufacturerAMD +
market segmentDesktop +
max case temperature363.15 K (90 °C, 194 °F, 653.67 °R) +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max storage temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
microarchitectureK7 +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature233.15 K (-40 °C, -40 °F, 419.67 °R) +
model numberDuron 600 +
nameDuron 600 +
part numberD600AUT1B + and D0600AUT1B +
process180 nm (0.18 μm, 1.8e-4 mm) +
seriesDuron Desktop +
smp max ways1 +
tdp27.4 W (27,400 mW, 0.0367 hp, 0.0274 kW) +
technologyCMOS +
thread count1 +
transistor count25,000,000 +
word size32 bit (4 octets, 8 nibbles) +