From WikiChip
Difference between revisions of "intel/microarchitectures/merced"
(Created page with "{{intel title|Merced|arch}} {{microarchitecture | atype = CPU | name = Merced | designer = Intel | manufacturer = Intel | introduction = June, 2001 | p...") |
|||
Line 9: | Line 9: | ||
| process = 180 nm | | process = 180 nm | ||
| cores = 1 | | cores = 1 | ||
− | |||
| pipeline = <!-- yes for following options --> | | pipeline = <!-- yes for following options --> | ||
| type = <!-- e.g. "Superscalar" --> | | type = <!-- e.g. "Superscalar" --> | ||
Line 23: | Line 22: | ||
| inst = <!-- yes for instructions options --> | | inst = <!-- yes for instructions options --> | ||
− | | isa = | + | | isa = IA-64 |
− | |||
− | |||
| feature = | | feature = | ||
| extension = | | extension = |
Revision as of 18:56, 30 November 2017
Edit Values | |
Merced µarch | |
General Info | |
Arch Type | CPU |
Designer | Intel |
Manufacturer | Intel |
Introduction | June, 2001 |
Process | 180 nm |
Core Configs | 1 |
Instructions | |
ISA | IA-64 |
Succession | |
Merced was the first Itanium microarchitecture designed by Intel.
Facts about "Merced - Microarchitectures - Intel"
codename | Merced + |
core count | 1 + |
designer | Intel + |
first launched | June 2001 + |
full page name | intel/microarchitectures/merced + |
instance of | microarchitecture + |
instruction set architecture | IA-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Merced + |
process | 180 nm (0.18 μm, 1.8e-4 mm) + |