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Difference between revisions of "intel/core i3/i3-9100t"
< intel‎ | core i3

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{{unknown features}}
 
{{unknown features}}
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== Cache ==
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{{main|intel/microarchitectures/ice_lake#Memory_Hierarchy|l1=Ice Lake § Cache}}
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{{cache size
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|l1 cache=256 KiB
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|l1i cache=128 KiB
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|l1i break=4x32 KiB
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|l1i desc=8-way set associative
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|l1d cache=128 KiB
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|l1d break=4x32 KiB
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|l1d desc=8-way set associative
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|l1d policy=write-back
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|l2 cache=1 MiB
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|l2 break=4x256 KiB
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|l2 desc=4-way set associative
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|l2 policy=write-back
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|l3 cache=8 MiB
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|l3 break=4x2 MiB
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|l3 desc=16-way set associative
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|l3 policy=write-back
 +
}}

Revision as of 10:35, 26 November 2017

Template:mpu Core i3-9100T is a planned 64-bit mid-range performance x86 desktop processor by Intel set to be introduced in 2018. The i3-9100T is fabricated on Intel's 2nd generation 10nm+ process based on the Ice Lake microarchitecture.


DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.


Cache

Main article: Ice Lake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back
L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  4x256 KiB4-way set associativewrite-back
L3$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  4x2 MiB16-way set associativewrite-back
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Facts about "Core i3-9100T - Intel"
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l1$ size256 KiB (262,144 B, 0.25 MiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description4-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ description16-way set associative +
l3$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +