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Difference between revisions of "intel/xeon w"
< intel
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Revision as of 11:22, 31 August 2017
Xeon W | |
Developer | Intel |
Manufacturer | Intel |
Type | microprocessors |
Introduction | August 29, 2017 (announced) August 29, 2017 (launch) |
ISA | x86-64 |
µarch | Skylake |
Word size | 64 bit 8 octets
16 nibbles |
Process | 14 nm 0.014 μm
1.4e-5 mm |
Technology | CMOS |
Clock | 2.3 GHz-4.0 GHz |
Package | FCLGA-2066 |
Socket | Socket R4 |
Succession | |
← | |
Xeon E5 |
Xeon W is a family of enterprise 64-bit multi-core x86 workstations microprocessors.
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_w&oldid=62922"
Facts about "Xeon W - Intel"
designer | Intel + |
first announced | August 29, 2017 + |
first launched | August 29, 2017 + |
full page name | intel/xeon w + |
instance of | microprocessor family + |
instruction set architecture | x86-64 + |
main designer | Intel + |
manufacturer | Intel + |
microarchitecture | Skylake + |
name | Xeon W + |
package | FCLGA-2066 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
socket | Socket R4 + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |