Semiconductor & Computer Engineering
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Difference between revisions of "intel/celeron/807ue"
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== Expansions == | == Expansions == | ||
| + | {{expansions main | ||
| + | | | ||
| + | {{expansions entry | ||
| + | |type=PCIe | ||
| + | |pcie revision=2.0 | ||
| + | |pcie lanes=16 | ||
| + | |pcie config=1x16 | ||
| + | |pcie config 2=2x8 | ||
| + | |pcie config 3=1x8+2x4 | ||
| + | }} | ||
| + | }} | ||
== Graphics == | == Graphics == | ||
Revision as of 20:50, 19 August 2017
Cache
Memory controller
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Integrated Memory Controller
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Expansions
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Expansion Options |
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Graphics
Features
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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Facts about "Celeron 807UE - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Celeron 807UE - Intel#pcie + |
| has ecc memory support | true + |
| l1$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
| l2$ description | 8-way set associative + |
| l2$ size | 0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) + |
| l3$ description | 12-way set associative + |
| l3$ size | 1.5 MiB (1,536 KiB, 1,572,864 B, 0.00146 GiB) + |
| max memory bandwidth | 9.93 GiB/s (10,168.32 MiB/s, 10.662 GB/s, 10,662.256 MB/s, 0.0097 TiB/s, 0.0107 TB/s) + |
| max memory channels | 1 + |
| supported memory type | DDR3-1333 + and DDR3-1066 + |