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From WikiChip
Difference between revisions of "intel/celeron/807"
| Line 31: | Line 31: | ||
|core model=42 | |core model=42 | ||
|core stepping=J1 | |core stepping=J1 | ||
| + | |core stepping 2=Q0 | ||
|process=32 nm | |process=32 nm | ||
|transistors=504,000,000 | |transistors=504,000,000 | ||
Revision as of 20:32, 18 August 2017
Cache
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Supported x86 Extensions & Processor Features
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