-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Difference between revisions of "intel/celeron/807"
Line 6: | Line 6: | ||
|manufacturer=Intel | |manufacturer=Intel | ||
|model number=807 | |model number=807 | ||
+ | |s-spec=SR0PW | ||
|market=Mobile | |market=Mobile | ||
|family=Celeron | |family=Celeron | ||
|series=800 | |series=800 | ||
|locked=Yes | |locked=Yes | ||
− | |frequency=1, | + | |frequency=1,500 MHz |
|bus type=DMI 2.0 | |bus type=DMI 2.0 | ||
|bus links=4 | |bus links=4 | ||
Line 23: | Line 24: | ||
|core name=Sandy Bridge M | |core name=Sandy Bridge M | ||
|core family=6 | |core family=6 | ||
+ | |core stepping=J1 | ||
|process=32 nm | |process=32 nm | ||
|transistors=504,000,000 | |transistors=504,000,000 |
Revision as of 05:10, 18 August 2017
Cache
Memory controller
Expansions
Graphics
Features
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
|
||
|