From WikiChip
Difference between revisions of "intel/atom/c3858"
< intel‎ | atom

(→‎Features)
Line 40: Line 40:
 
|package module 1={{packages/intel/fcbga-1310}}
 
|package module 1={{packages/intel/fcbga-1310}}
 
}}
 
}}
−
'''Atom C3858''' is a {{arch|64}} [[dodeca-core]] ultra-low power [[x86]] microserver [[system on a chip]] introduced by [[Intel]] in 2017. The C3858, which is manufactured on a [[14 nm process]], is based on the {{intel|Goldmont|l=arch}} microarchitecture. This chip operates at 2 GHz with a [[TDP]] of 25 W. The C3858 supports up to a dual-channel of 256 GiB of DDR4-2400 [[ECC]] memory. This model is part of {{intel|Denverton|l=core}}'s [[part of::Network and Enterprise Storage SKUs]] and come with integrated {{intel|QuickAssist Technology}}.
+
'''Atom C3858''' is a {{arch|64}} [[dodeca-core]] ultra-low power [[x86]] microserver [[system on a chip]] introduced by [[Intel]] in 2017. The C3858, which is manufactured on a [[14 nm process]], is based on the {{intel|Goldmont|l=arch}} microarchitecture. This chip operates at 2 GHz with a [[TDP]] of 25 W. The C3858 supports up to 256 GiB of dual-channel DDR4-2400 [[ECC]] memory. This model is part of {{intel|Denverton|l=core}}'s [[part of::Network and Enterprise Storage SKUs]] and come with integrated {{intel|QuickAssist Technology}}.
  
 
== Cache ==
 
== Cache ==

Revision as of 01:19, 17 August 2017

Template:mpu Atom C3858 is a 64-bit dodeca-core ultra-low power x86 microserver system on a chip introduced by Intel in 2017. The C3858, which is manufactured on a 14 nm process, is based on the Goldmont microarchitecture. This chip operates at 2 GHz with a TDP of 25 W. The C3858 supports up to 256 GiB of dual-channel DDR4-2400 ECC memory. This model is part of Denverton's Network and Enterprise Storage SKUs and come with integrated QuickAssist Technology.

Cache

Main article: Goldmont § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$672 KiB
688,128 B
0.656 MiB
L1I$384 KiB
393,216 B
0.375 MiB
12x32 KiB8-way set associativewrite-back
L1D$288 KiB
294,912 B
0.281 MiB
12x24 KiB6-way set associativewrite-back
L2$12 MiB
12,288 KiB
12,582,912 B
0.0117 GiB
  6x2 MiB16-way set associativewrite-back

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3L-1600, DDR4-2400
Supports ECCYes
Max Mem256 GiB
Controllers1
Channels2
Max Bandwidth35.76 GiB/s
36,618.24 MiB/s
38.397 GB/s
38,397.008 MB/s
0.0349 TiB/s
0.0384 TB/s
Bandwidth
Single 17.88 GiB/s
Double 35.76 GiB/s

Expansions

This chip incorporates 20 high-speed I/O (HSIO) lanes that may be configured as any combination of the following:

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 3.0
Max Lanes: 20
Configuration: x8, x4, x2
USBRevision: 3.0
Max Ports: 8
SATARevision: 3.0
Max Ports: 16
HSIOMax Lanes: 20


Features

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/atom/c3858&oldid=57488"
Facts about "Atom C3858 - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Atom C3858 - Intel#package + and Atom C3858 - Intel#pcie +
base frequency2,000 MHz (2 GHz, 2,000,000 kHz) +
clock multiplier20 +
core count12 +
core family6 +
core model95 +
core nameDenverton +
core steppingB1 +
designerIntel +
familyAtom +
first announcedAugust 15, 2017 +
first launchedAugust 15, 2017 +
full page nameintel/atom/c3858 +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Integrated QuickAssist Technology +, Extended Page Tables + and Memory Protection Extensions +
has integrated intel quickassist technologytrue +
has intel enhanced speedstep technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size672 KiB (688,128 B, 0.656 MiB) +
l1d$ description6-way set associative +
l1d$ size288 KiB (294,912 B, 0.281 MiB) +
l1i$ description8-way set associative +
l1i$ size384 KiB (393,216 B, 0.375 MiB) +
l2$ description16-way set associative +
l2$ size12 MiB (12,288 KiB, 12,582,912 B, 0.0117 GiB) +
ldateAugust 15, 2017 +
main imageFile:denverton (front).png +
manufacturerIntel +
market segmentServer + and Embedded +
max case temperature356.15 K (83 °C, 181.4 °F, 641.07 °R) +
max cpu count1 +
max hsio lanes20 +
max junction temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory262,144 MiB (268,435,456 KiB, 274,877,906,944 B, 256 GiB, 0.25 TiB) +
max memory bandwidth35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) +
max memory channels2 +
max sata ports16 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
max usb ports8 +
microarchitectureGoldmont +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberC3858 +
nameAtom C3858 +
packageFCBGA-1310 +
part numberHW8076502639501 +
part ofNetwork and Enterprise Storage SKUs +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 332.00 (€ 298.80, £ 268.92, ¥ 34,305.56) +
s-specSR38A +
series3000 +
smp max ways1 +
supported memory typeDDR3L-1600 + and DDR4-2400 +
tdp25 W (25,000 mW, 0.0335 hp, 0.025 kW) +
technologyCMOS +
thread count12 +
word size64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensionstrue +