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Difference between revisions of "intel/cores/sandy bridge m"
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{{intel title|Sandy Bridge M}} | {{intel title|Sandy Bridge M}} | ||
− | {{core}} | + | {{core |
+ | |name=Sandy Bridge M | ||
+ | |no image=Yes | ||
+ | |developer=Intel | ||
+ | |manufacturer=Intel | ||
+ | |first announced=December 30, 2010 | ||
+ | |first launched=January 5, 2011 | ||
+ | |isa=x86-64 | ||
+ | |isa family=x86 | ||
+ | |microarch=Sandy Bridge | ||
+ | |chipset=Cougar Point | ||
+ | |word=64 bit | ||
+ | |proc=32 nm | ||
+ | |tech=CMOS | ||
+ | |predecessor=Arrandale | ||
+ | |predecessor link=intel/cores/arrandale | ||
+ | |successor=Ivy Bridge M | ||
+ | |successor link=intel/cores/ivy bridge m | ||
+ | }} | ||
'''Sandy Bridge M''' was a core name for [[Intel]]'s mobile processors based on the {{intel|Sandy Bridge|l=arch}} microarchitecture serving as a successor to {{\\|Arrandale}}. | '''Sandy Bridge M''' was a core name for [[Intel]]'s mobile processors based on the {{intel|Sandy Bridge|l=arch}} microarchitecture serving as a successor to {{\\|Arrandale}}. |
Revision as of 19:29, 11 August 2017
Edit Values | |
Sandy Bridge M | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Introduction | December 30, 2010 (announced) January 5, 2011 (launched) |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Sandy Bridge |
Chipset | Cougar Point |
Word Size | 8 octets 64 bit16 nibbles |
Process | 32 nm 0.032 μm 3.2e-5 mm |
Technology | CMOS |
Succession | |
Sandy Bridge M was a core name for Intel's mobile processors based on the Sandy Bridge microarchitecture serving as a successor to Arrandale.
Facts about "Sandy Bridge M - Cores - Intel"
chipset | Cougar Point + |
designer | Intel + |
first announced | December 30, 2010 + |
first launched | January 5, 2011 + |
instance of | core + |
isa | x86-64 + |
isa family | x86 + |
manufacturer | Intel + |
microarchitecture | Sandy Bridge + |
name | Sandy Bridge M + |
process | 32 nm (0.032 μm, 3.2e-5 mm) + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |