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Difference between revisions of "intel/core i5/i5-8400"
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'''Core i5-8400''' is a {{arch|64}} [[hexa-core]] mid-range performance [[x86]] desktop microprocessor set to be introduced by [[Intel]] in [[2017]]. This processor, which is based on the {{intel|Coffee Lake|l=arch}} microarchitecture, is manufactured on Intel's 3rd generation enhanced [[14 nm process|14nm++ process]]. The i5-8400 operates at a 2.8 GHz with a TDP of 65 W and a {{intel|Turbo Boost}} frequency of up to 3.9 GHz. This chip supports up to 64 GiB of dual-channel non-ECC DDR4-2666 memory and incorporates Intel's {{intel|HD Graphics 630}} IGP operating at ? MHz with a burst frequency of ? GHz. | '''Core i5-8400''' is a {{arch|64}} [[hexa-core]] mid-range performance [[x86]] desktop microprocessor set to be introduced by [[Intel]] in [[2017]]. This processor, which is based on the {{intel|Coffee Lake|l=arch}} microarchitecture, is manufactured on Intel's 3rd generation enhanced [[14 nm process|14nm++ process]]. The i5-8400 operates at a 2.8 GHz with a TDP of 65 W and a {{intel|Turbo Boost}} frequency of up to 3.9 GHz. This chip supports up to 64 GiB of dual-channel non-ECC DDR4-2666 memory and incorporates Intel's {{intel|HD Graphics 630}} IGP operating at ? MHz with a burst frequency of ? GHz. | ||
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Revision as of 05:17, 2 August 2017
Template:mpu Core i5-8400 is a 64-bit hexa-core mid-range performance x86 desktop microprocessor set to be introduced by Intel in 2017. This processor, which is based on the Coffee Lake microarchitecture, is manufactured on Intel's 3rd generation enhanced 14nm++ process. The i5-8400 operates at a 2.8 GHz with a TDP of 65 W and a Turbo Boost frequency of up to 3.9 GHz. This chip supports up to 64 GiB of dual-channel non-ECC DDR4-2666 memory and incorporates Intel's HD Graphics 630 IGP operating at ? MHz with a burst frequency of ? GHz.
Cache
- Main article: Coffee Lake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Facts about "Core i5-8400 - Intel"
l1$ size | 386 KiB (395,264 B, 0.377 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 192 KiB (196,608 B, 0.188 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 192 KiB (196,608 B, 0.188 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 1.5 MiB (1,536 KiB, 1,572,864 B, 0.00146 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 12 MiB (12,288 KiB, 12,582,912 B, 0.0117 GiB) + |