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Difference between revisions of "intel/xeon bronze/3106"
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|l3 desc=11-way set associative
 
|l3 desc=11-way set associative
 
|l3 policy=write-back
 
|l3 policy=write-back
 +
}}
 +
 +
== Memory controller ==
 +
{{memory controller
 +
|type=DDR4-2133
 +
|ecc=Yes
 +
|max mem=768 GiB
 +
|controllers=2
 +
|channels=6
 +
|max bandwidth=95.37 GiB/s
 +
|bandwidth schan=15.89 GiB/s
 +
|bandwidth dchan=31.79 GiB/s
 +
|bandwidth qchan=63.58 GiB/s
 +
|bandwidth hchan=95.37 GiB/s
 
}}
 
}}

Revision as of 14:20, 11 July 2017

Template:mpu Xeon Bronze 3106 is a 64-bit octa-core x86 dual-socket entry-level server and workstation microprocessor introduced by Intel in mid-2017. The Bronze 3106, which is based on the server configuration of the Skylake microarchitecture and is manufactured on a 14 nm process sports 1 AVX-512 FMA unit as well as two Ultra Path Interconnect links. This microprocessor, which operates at 1.7 GHz with a TDP of 85 W, supports up 768 GiB of hexa-channel DDR4-2133 ECC memory.

Cache

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$512 KiB
524,288 B
0.5 MiB
L1I$256 KiB
262,144 B
0.25 MiB
8x32 KiB8-way set associative 
L1D$256 KiB
262,144 B
0.25 MiB
8x32 KiB8-way set associativewrite-back

L2$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  8x1 MiB16-way set associativewrite-back

L3$11 MiB
11,264 KiB
11,534,336 B
0.0107 GiB
  8x1.375 MiB11-way set associativewrite-back

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2133
Supports ECCYes
Max Mem768 GiB
Controllers2
Channels6
Max Bandwidth95.37 GiB/s
97,658.88 MiB/s
102.403 GB/s
102,402.758 MB/s
0.0931 TiB/s
0.102 TB/s
Bandwidth
Single 15.89 GiB/s
Double 31.79 GiB/s
Quad 63.58 GiB/s
Hexa 95.37 GiB/s
has ecc memory supporttrue +
l1$ size512 KiB (524,288 B, 0.5 MiB) +
l1d$ description8-way set associative +
l1d$ size256 KiB (262,144 B, 0.25 MiB) +
l1i$ description8-way set associative +
l1i$ size256 KiB (262,144 B, 0.25 MiB) +
l2$ description16-way set associative +
l2$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
l3$ description11-way set associative +
l3$ size11 MiB (11,264 KiB, 11,534,336 B, 0.0107 GiB) +
max memory bandwidth95.37 GiB/s (97,658.88 MiB/s, 102.403 GB/s, 102,402.758 MB/s, 0.0931 TiB/s, 0.102 TB/s) +
max memory channels6 +
supported memory typeDDR4-2133 +