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Revision as of 23:01, 27 June 2017

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ARM2 µarch
General Info
Arch TypeCPU
DesignerARM Holdings
ManufacturerVLSI Technology
Introduction1986
Process2 µm
Core Configs1
Pipeline
TypeScalar, Pipelined
Stages3
Decode1-way
Instructions
ISAARMv2
Cache
L1I Cache0 KiB/Core
L1D Cache0 KiB/Core
Succession
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Facts about "ARM2 - Microarchitectures - Acorn"
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codenameARM2 +
core count1 +
designerARM Holdings +
first launched1986 +
full page nameacorn/microarchitectures/arm2 +
instance ofmicroarchitecture +
instruction set architectureARMv2 +
manufacturerVLSI Technology +
microarchitecture typeCPU +
nameARM2 +
pipeline stages3 +
process2,000 nm (2 μm, 0.002 mm) +