From WikiChip
Difference between revisions of "amd/k6-iii-p/amd-k6-iii-333afk"
< amd

m (Bot: Automated text replacement (-\| electrical += Yes +))
Line 46: Line 46:
 
| max memory          = 4 GiB
 
| max memory          = 4 GiB
  
−
| electrical          = Yes
+
 
 
| power              = 16 W
 
| power              = 16 W
 
| v core              = 2.2 V
 
| v core              = 2.2 V

Revision as of 20:56, 23 June 2017

Template:mpu AMD-K6-III/333AFK is a 32-bit x86 mobile microprocessor designed by AMD and introduced in early 1999. This MPU which was manufactured on a 0.25 µm process, based on K6-III microarchitecture, operated at 333 MHz with a bus of 95 MHz. While default to a 95 MHz bus (Super 7), this model can also operate at the old Socket 7 bus speed of 66 MHz (multiplier of 5). This MPU dissipated a maximum of 16 W with a typical power dissipation of 12.6 W.

Cache

Main article: K6-III § Cache

L3$ can be 512 KB to 2 MB, depending on manufacturer and motherboard model. L3$ is off-chip. L2$ operated at full core speed.

Cache Info [Edit Values]
L1I$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative
L1D$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative
L2$ 256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
1x256 KiB 4-way set associative (shared)

Graphics

This SoC has no integrated graphics processing unit.

Features

Template:mpu features

  • Auto-power down state
  • Stop clock state
  • Halt state
Retrieved from "https://en.wikichip.org/w/index.php?title=amd/k6-iii-p/amd-k6-iii-333afk&oldid=47238"
Facts about "AMD-K6-III/333AFK - AMD"
RDF feed
l1d$ description2-way set associative +
l1d$ size32 KiB (32,768 B, 0.0313 MiB) +
l1i$ description2-way set associative +
l1i$ size32 KiB (32,768 B, 0.0313 MiB) +
l2$ description4-way set associative +
l2$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +