Difference between revisions of "WikiChip:sandbox"

Revision as of 13:06, 16 April 2017

Welcome to this sandbox page. Sandbox pages provide space to experiment with the process of editing.

ssssssssssss

DATA BUS I/O		D₀	01		16	CM-RAM₀		X

		D₁	02		15	CM-RAM₁	X

		D₂	03		14	CM-RAM₂	X

		D₃	04		13	CM-RAM₃	X

		V_ss	05		12	V_dd	X

CLOCK PHASE 1/2		Ø₁	06		11	CM-ROM	X

		Ø₂	07		10	TEST	X

		SYNC	08		09	RESET	X

1	2	3	4	5	6	7	8	9

Cache Info

Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes.

[Edit Values]

L1$

128 KiB

L1I$	64 KiB	1x64 KiB	2-way set associative	write-back
L1D$	64 KiB	1x64 KiB	2-way set associative	write-back

L2$

128 KiB

L2I$	64 KiB	1x64 KiB	2-way set associative	write-back
L2D$	64 KiB	1x64 KiB	2-way set associative	write-back

L3$

128 KiB

L3I$	64 KiB	1x64 KiB	2-way set associative	write-back
L3D$	64 KiB	1x64 KiB	2-way set associative	write-back

L4$

128 KiB

L4I$	64 KiB	1x64 KiB	2-way set associative	write-back
L4D$	64 KiB	1x64 KiB	2-way set associative	write-back

Off-package cache support

Mobo

512 KiB

1x64 KiB

2-way set associative

write-back

wireless test

Wireless Communications

Wi-Fi

WiFi

802.11-1997	Yes
802.11a	Yes
802.11b	Yes
802.11g	Yes
802.11n	Yes
802.11ac	Yes
802.11ad	Yes

Cellular

2G

GSM

Yes

GPRS

Yes

EDGE

Yes

cdmaOne

IS-95A	Yes
IS-95B	Yes

3G

UMTS

WCDMA	Yes
HSDPA	Yes	7.2 Mbps
HSUPA	Yes	5.76 Mbps

CDMA2000

1X	Yes
1xEV-DO	Yes
1X Advanced	Yes

Satellite

mpu

AMD-X5-133ADW

General Info
Designer	AMD
Manufacturer	AMD
Model Number	AMD-X5-133ADW
Part Number	AMD-X5-133ADW, AMD-X5-133ADW, AMD-X5-133ADW
Market	Desktop
Market	Desktop

ecd9c6

@@ Line 89: / Line 89: @@
 == comptable ==
-test
+<timeline>
-test
+ImageSize  = width:1000 height:300
+PlotArea   = left:20 right:10 top:10 bottom:25 #left:0 right:0 bottom:20 top:0
-{{comp table start}}
+DateFormat = mm/dd/yyyy
-<table class="comptable sortable">
+Period     = from:2015 till:2018
-<tr class="comptable-header"><th>&nbsp;</th><th colspan="7">Main processor</th><th colspan="3">IGP</th></tr>
+ScaleMajor = unit:year increment:1 start:2015
-<tr class="comptable-header"><th class="unsortable">Model</th><th>Process</th><th>Launched</th><th>C</th><th>T</th><th>Freq</th><th>TDP</th><th>Max Mem</th><th>Name</th><th>Freq</th><th>Turbo Freq</th></tr>
+ScaleMinor = unit:month increment:1 start:2015
-{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Core i3]] [[microarchitecture::Kaby Lake]] [[market segment::Desktop]]
- |?full page name
- |?model number
- |?process
- |?first launched
- |?core count
- |?thread count
- |?base frequency#GHz
- |?tdp
- |?max memory#GiB
- |?integrated gpu
- |?integrated gpu base frequency#MHz
- |?integrated gpu max frequency#GHz
- |format=template
- |template=proc table 3
- |userparam=12
- |mainlabel=-
-}}
-{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Core i3]] [[microarchitecture::Kaby Lake]] [[market segment::Desktop]]}}
-</table>
-{{comp table end}}
-test
+TimeAxis   = orientation:horizontal
-test
+AlignBars  = justify
+BarData =
+  barset:Microarchitectures
+    bar:Kaby_Lake
+    bar:Skylake
+  barset:Cores
+PlotData=
+  bar:Kaby_Lake
+    color:yelloworange width:22 fontsize:10 textcolor:black shift:(5,-4)
+    from:08/30/2016 till:03/28/2017 anchor:from text:"[[intel/microarchitectures/kaby_lake|Kaby Lake]]"
+  bar:Skylake
+    color:redorange width:22 fontsize:10 textcolor:black shift:(5,-4)
+    from:09/01/2015 till:11/10/2016 anchor:from text:"[[intel/microarchitectures/skylake|Skylake]]"
+</timeline>
+<timeline>
+ImageSize = width:600 height:100
+PlotArea = left:20 right:10 top:10 bottom:25
+TimeAxis = orientation:horizontal
+Period = from:1890 till:2005
+ScaleMajor = unit:year increment:20 start:1900
+ScaleMinor = unit:year increment:10 start:1890
+PlotData =
+  bar:X color:red align:center
+  from:start till:1910 text:"Period 1"
+  from:1920 till:1940 text:"Period 2" color:green
+  from:1950 till:end text:"Period 3"
+  bar:Y color:blue
+  from:start till:1930 text:"Period 1" textcolor:white
+  from:1960 till:end text:"Period 2"
+LineData =
+  at:1935 color:black layer:back
+  at:2000 color:yellow layer:front
+</timeline>
 == Tabl test ==

WikiChip

The Fuse Coverage

Social Media

Companies

Microarchitectures

Technology Nodes

Intel

AMD

ARM

Cavium

Samsung

Intel

AMD

Ampere

Apple

Cavium

HiSilicon

MediaTek

NXP

Qualcomm

Renesas

Samsung

Revision as of 13:06, 16 April 2017

Contents

wireless test

mpu

comptable

Tabl test