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Difference between revisions of "intel/cores/sodaville"
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== Die Shot == | == Die Shot == | ||
| + | * [[45 nm process]] | ||
| + | * die size 8 mm x 12 mm | ||
| + | * die area 96 mm² | ||
[[File:sodaville die shot.png|750px]] | [[File:sodaville die shot.png|750px]] | ||
== Documents == | == Documents == | ||
* [[:File:sodaville-product-brief.pdf|Sodaville Product Brief]] | * [[:File:sodaville-product-brief.pdf|Sodaville Product Brief]] | ||
Latest revision as of 21:38, 3 April 2017
| Edit Values | |
| Sodaville | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Introduction | August 20, 2008 (announced) September 24, 2009 (launched) |
| Microarchitecture | |
| Microarchitecture | Bonnell |
| Word Size | 4 octets 32 bit8 nibbles |
| Process | 45 nm 0.045 μm 4.5e-5 mm |
| Technology | CMOS |
| Succession | |
Sodaville is the core for Intel's series of consumer electronics system on chips based on the Bonnell microarchitecture. Fabricated on a 45 nm process, Sodaville is the successor to Canmore. Sodaville SoCs were branded as Intel CE 41xx model.
Overview[edit]
| This section is empty; you can help add the missing info by editing this page. |
Die Shot[edit]
- 45 nm process
- die size 8 mm x 12 mm
- die area 96 mm²
Documents[edit]
Facts about "Sodaville - Cores - Intel"
| designer | Intel + |
| first announced | August 20, 2008 + |
| first launched | September 24, 2009 + |
| instance of | core + |
| manufacturer | Intel + |
| microarchitecture | Bonnell + |
| name | Sodaville + |
| process | 45 nm (0.045 μm, 4.5e-5 mm) + |
| technology | CMOS + |
| word size | 32 bit (4 octets, 8 nibbles) + |