From WikiChip
Difference between revisions of "intel/atom/z520pt"
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| sdp = | | sdp = | ||
| tdp = 2 W | | tdp = 2 W | ||
− | | tjunc min = | + | | tjunc min = -40 °C |
− | | tjunc max = | + | | tjunc max = 110 °C |
| tcase min = -40 °C | | tcase min = -40 °C | ||
| tcase max = 85 °C | | tcase max = 85 °C |
Revision as of 19:04, 1 April 2017
Template:mpu Z520PT is an ultra-low power 32-bit x86 microprocessor introduced by Intel in early 2009 specifically for Mobile Internet Devices (MID). The Z520PT, which is based on the Bonnell microarchitecture (Silverthorne core), is manufactured on a 45 nm process. This processor operates at 1.33 Ghz with a TDP of 2 W. The MPU features a legacy 533 MT/s front-side bus capable of communicating with the Poulsbo chipset in both low-power CMOS mode as well as normal GTL mode (which also works with other chipsets).
This model is identical to the Z520 model but comes in a larger package and has industrial temperature range support. This processor has a TDP of 2 W when Hyper-Threading is disabled and 2.2 W when enabled.