Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "loongson/godson 2/2g"
| Line 39: | Line 39: | ||
| core stepping = | | core stepping = | ||
| process = 65 nm | | process = 65 nm | ||
| − | | transistors = | + | | transistors = 100,000,000 |
| technology = CMOS | | technology = CMOS | ||
| die area = 53.54 mm² | | die area = 53.54 mm² | ||
| Line 90: | Line 90: | ||
}} | }} | ||
'''Godson-2G''' is a {{arch|64}} [[MIPS]] performance processor developed by [[Institute of Computing Technology of the Chinese Academy of Sciences|ICT]] and later [[Loongson]] for desktop computers. Introduced in late-[[2010]], the Godson-2G operates at up to 1 GHz consuming up to 4 W. This chip was manufactured on [[STMicroelectronics]]' [[65 nm process]]. | '''Godson-2G''' is a {{arch|64}} [[MIPS]] performance processor developed by [[Institute of Computing Technology of the Chinese Academy of Sciences|ICT]] and later [[Loongson]] for desktop computers. Introduced in late-[[2010]], the Godson-2G operates at up to 1 GHz consuming up to 4 W. This chip was manufactured on [[STMicroelectronics]]' [[65 nm process]]. | ||
| + | |||
| + | == Die Shot == | ||
| + | * [[65 nm process]] | ||
| + | * 100,000,000 transistors | ||
| + | * 53.54 mm² die size | ||
| + | [[File:godson-2g die shot.png|700px]] | ||
== References == | == References == | ||
* Zhao, Ji-Ye, et al. "Physical Design Methodology for Godson-2G Microprocessor." Journal of Computer Science and Technology 25.2 (2010): 225-231. | * Zhao, Ji-Ye, et al. "Physical Design Methodology for Godson-2G Microprocessor." Journal of Computer Science and Technology 25.2 (2010): 225-231. | ||
Revision as of 17:52, 18 March 2017
Template:mpu Godson-2G is a 64-bit MIPS performance processor developed by ICT and later Loongson for desktop computers. Introduced in late-2010, the Godson-2G operates at up to 1 GHz consuming up to 4 W. This chip was manufactured on STMicroelectronics' 65 nm process.
Die Shot
- 65 nm process
- 100,000,000 transistors
- 53.54 mm² die size
References
- Zhao, Ji-Ye, et al. "Physical Design Methodology for Godson-2G Microprocessor." Journal of Computer Science and Technology 25.2 (2010): 225-231.
Facts about "Godson-2G - Loongson"
| has ecc memory support | true + |
| l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l1d$ description | 4-way set associative + |
| l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l1i$ description | 4-way set associative + |
| l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l2$ description | 4-way set associative + |
| l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
| max memory bandwidth | 11.92 GiB/s (12,206.08 MiB/s, 12.799 GB/s, 12,799.003 MB/s, 0.0116 TiB/s, 0.0128 TB/s) + |
| max memory channels | 1 + |
| supported memory type | DDR3-800 + |