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Difference between revisions of "samsung/exynos"
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Revision as of 14:58, 26 February 2017
| Samsung Exynos | |
| |
| Exynos Logo | |
| Developer | Samsung, ARM Holdings |
| Manufacturer | Samsung |
| Type | System on Chips |
| Architecture | ARM performance processors |
| ISA | ARMv7, ARMv8 |
| µarch | Cortex-A7, Cortex-A8, Cortex-A9, Cortex-A15, Cortex-A53, Cortex-A57, Mongoose M1, Mongoose M2 |
| Word size | 32 bit 4 octets , 64 bit8 nibbles 8 octets
16 nibbles |
| Process | 45 nm 0.045 μm , 32 nm4.5e-5 mm 0.032 μm , 28 nm3.2e-5 mm 0.028 μm , 20 nm2.8e-5 mm 0.02 μm , 14 nm2.0e-5 mm 0.014 μm , 10 nm1.4e-5 mm 0.01 μm
1.0e-5 mm |
| Technology | CMOS |
| Clock | 1,000 MHz-2,500 MHz |
| Succession | |
| ← | |
| S3 | |
Exynos is a family of performance 32-bit and 64-bit ARM processors introduced by Samsung for the mobile market.
Facts about "Exynos - Samsung"
| designer | Samsung + and ARM Holdings + |
| full page name | samsung/exynos + |
| instance of | system on a chip family + |
| instruction set architecture | ARMv7 + and ARMv8 + |
| main designer | Samsung + |
| manufacturer | Samsung + |
| microarchitecture | Cortex-A7 +, Cortex-A8 +, Cortex-A9 +, Cortex-A15 +, Cortex-A53 +, Cortex-A57 +, Mongoose M1 + and Mongoose M2 + |
| name | Samsung Exynos + |
| process | 45 nm (0.045 μm, 4.5e-5 mm) +, 32 nm (0.032 μm, 3.2e-5 mm) +, 28 nm (0.028 μm, 2.8e-5 mm) +, 20 nm (0.02 μm, 2.0e-5 mm) +, 14 nm (0.014 μm, 1.4e-5 mm) + and 10 nm (0.01 μm, 1.0e-5 mm) + |
| technology | CMOS + |
| word size | 32 bit (4 octets, 8 nibbles) + and 64 bit (8 octets, 16 nibbles) + |