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Difference between revisions of "intel/celeron/3755u"
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'''Celeron 3755U''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in early [[2015]]. Operating at 1.7 GHz with a TDP of 15 W and a configurable TDP-down of of 10 W at 600 MHz, this {{intel|Broadwell|l=arch}}-based microprocessor is manufactured on Intel's [[14 nm process]].
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== Cache ==
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{{main|intel/microarchitectures/broadwell#Memory_Hierarchy|l1=Broadwell § Cache}}
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{{cache info
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|l1i cache=64 KiB
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|l1i break=4x32 KiB
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|l1i desc=8-way set associative
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|l1i extra=(per core, write-back)
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|l1d cache=64 KiB
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|l1d break=4x32 KiB
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|l1d desc=8-way set associative
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|l1d extra=(per core, write-back)
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|l2 cache=512 KiB
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|l2 break=2x256 KiB
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|l2 desc=8-way set associative
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|l2 extra=(per core, write-back)
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|l3 cache=2 MiB
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|l3 break=2x1 MiB
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|l3 desc=12-way set associative
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|l3 extra=(shared)
 
}}
 
}}

Revision as of 13:13, 13 November 2016

Template:mpu Celeron 3755U is a 64-bit dual-core x86 mobile microprocessor introduced by Intel in early 2015. Operating at 1.7 GHz with a TDP of 15 W and a configurable TDP-down of of 10 W at 600 MHz, this Broadwell-based microprocessor is manufactured on Intel's 14 nm process.

Cache

Main article: Broadwell § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
4x32 KiB 8-way set associative (per core, write-back)
L1D$ 64 KiB
65,536 B
0.0625 MiB
4x32 KiB 8-way set associative (per core, write-back)
L2$ 512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
2x256 KiB 8-way set associative (per core, write-back)
L3$ 2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
2x1 MiB 12-way set associative (shared)
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Facts about "Celeron 3755U - Intel"
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l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description8-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description12-way set associative +
l3$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +