From WikiChip
Difference between revisions of "intel/atom x7/x7-e3950"
< intel‎ | atom x7

(→‎Die Shot)
Line 70: Line 70:
 
| socket 0 type      = BGA
 
| socket 0 type      = BGA
 
}}
 
}}
−
The '''Atom x7-E3950''' is a {{arch|64}} quad-core microprocessor set to be introduced by [[Intel]] in early 2017. This ultra-low power MPU, which was specifically designed for the [[internet of things|IoTs]], operates at 1.6 GHz and has a TDP of 12 W. This chip is based on the {{intel|Goldmont|l=arch}}, manufactured on Intel's enhanced [[14 nm process]].
+
The '''Atom x7-E3950''' is a {{arch|64}} quad-core system on a chip set to be introduced by [[Intel]] in early 2017. This ultra-low power MPU, which was specifically designed for the [[internet of things|IoTs]], operates at 1.6 GHz and has a TDP of 12 W. This chip is based on the {{intel|Goldmont|l=arch}}, manufactured on Intel's enhanced [[14 nm process]].
  
  

Revision as of 05:52, 26 October 2016

Template:mpu The Atom x7-E3950 is a 64-bit quad-core system on a chip set to be introduced by Intel in early 2017. This ultra-low power MPU, which was specifically designed for the IoTs, operates at 1.6 GHz and has a TDP of 12 W. This chip is based on the Goldmont, manufactured on Intel's enhanced 14 nm process.


DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.

Cache

Main article: Goldmont § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
2x32 KiB 8-way set associative (per core)
L1D$ 48 KiB
49,152 B
0.0469 MiB
2x24 KiB 6-way set associative (per core)
L2$ 2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
2x1 MiB 16-way set associative (per 2 cores)
L3$ 0 KiB
0 MiB
0 B
0 GiB
No L3$

Memory controller

Integrated Memory Controller
Type LPDDR3-1333, LPDDR3-1600, LPDDR3-2400, DDR3L-1333, DDR3L-1600, DDR3L-1867, LPDDR4-1600, LPDDR4-2133, LPDDR4-2400
Controllers 1
Channels 2
ECC Support Yes
Bandwidth (single) 19,200 MB/s
Bandwidth (dual) 38,400 MB/s
Max memory 8,192 MB

Graphics

Integrated Graphic Information
GPU HD Graphics ??
Device ID ?
Execution Units 12
Displays 3
Frequency  ? MHz
"? MHz" is not a number.
Max frequency  ? MHz
"? MHz" is not a number.
Max memory 8 GB
"GB" is not declared as a valid unit of measurement for this property.
Output DisplayPort, Embedded DisplayPort, HDMI, DSI
DirectX 12
OpenGL 4.3
OpenCL 1.2
OpenGL ES 3.0
HDMI 1.4b
DP 1.2
eDP 1.3
Max HDMI Res 3840x2160 @30 Hz
Max DSI Res 2560x1600 @60 Hz
Max DP Res 4096x2160 @60 Hz
Max eDP Res 3840x2160 @60 Hz
  • Video decode hardware acceleration including support for HEVC (H.265), H.264, MVC, VP8, VP9, MPEG2, VC-1, WMV9, JPEG/MJPEG.
  • Video encode hardware acceleration including support for HEVC (H.265), H.264, MVC, VP8, VP9, JPEG/MJPEG.

Expansions

Template:mpu expansions

Features

Template:mpu features

Die Shot

Intel Goldmont-based Atom E3900 SoC series die shot:

atom e3900 die shot.jpg

Documents

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/atom_x7/x7-e3950&oldid=26305"
Facts about "Atom x7-E3950 - Intel"
RDF feed
device id? +
has featureintegrated gpu +
integrated gpuHD Graphics ?? +
l1d$ description6-way set associative +
l1d$ size48 KiB (49,152 B, 0.0469 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
l3$ descriptionNo L3$ +
l3$ size0 MiB (0 KiB, 0 B, 0 GiB) +