From WikiChip
Difference between revisions of "amd/duron/d550aut1b"
< amd‎ | duron

Line 80: Line 80:
 
}}
 
}}
 
'''Duron 550''' based on the Spitfire core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This model was part of the first series of the {{amd|Duron}} family. Designed based on AMD's {{amd|microarchitecture/k7|K7}} (a {{amd|Thunderbird}}-derivative) on a [[180 nm process]], this MPU operated at 550 MHz with a bus capable of 200 MT/s with a typical TDP of 25.4W.
 
'''Duron 550''' based on the Spitfire core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in 2000. This model was part of the first series of the {{amd|Duron}} family. Designed based on AMD's {{amd|microarchitecture/k7|K7}} (a {{amd|Thunderbird}}-derivative) on a [[180 nm process]], this MPU operated at 550 MHz with a bus capable of 200 MT/s with a typical TDP of 25.4W.
 +
 +
== Cache ==
 +
{{main|amd/microarchitectures/k7#Memory_Hierarchy|l1=K7 § Cache}}
 +
{{cache info
 +
|l1i cache=64 KB
 +
|l1i break=1x64 KB
 +
|l1i desc=2-way set associative
 +
|l1i extra=
 +
|l1d cache=64 KB
 +
|l1d break=1x64 KB
 +
|l1d desc=2-way set associative
 +
|l1d extra=
 +
|l2 cache=64 KB
 +
|l2 break=1x64 KB
 +
|l2 desc=16-way set associative
 +
|l2 extra=
 +
|l3 cache=
 +
|l3 break=
 +
|l3 desc=
 +
|l3 extra=
 +
}}
 +
 +
== Graphics ==
 +
This SoC has no integrated graphics processing unit.
 +
 +
== Features ==
 +
{{mpu features
 +
| em64t      =
 +
| nx          =
 +
| txt        =
 +
| tsx        =
 +
| vpro        =
 +
| ht          =
 +
| tbt1        =
 +
| tbt2        =
 +
| bpt        =
 +
| vt-x        =
 +
| vt-d        =
 +
| ept        =
 +
| mmx        = Yes
 +
| emmx        = Yes
 +
| 3dnow      = Yes
 +
| e3dnow      = Yes
 +
| sse        =
 +
| sse2        =
 +
| sse3        =
 +
| ssse3      =
 +
| sse4        =
 +
| sse4.1      =
 +
| sse4.2      =
 +
| aes        =
 +
| pclmul      =
 +
| avx        =
 +
| avx2        =
 +
| bmi        =
 +
| bmi1        =
 +
| bmi2        =
 +
| f16c        =
 +
| fma3        =
 +
| mpx        =
 +
| sgx        =
 +
| eist        =
 +
}}
 +
* [[has feature::Halt State]]
 +
* [[has feature::Sleep State]]

Revision as of 23:08, 22 August 2016

Template:mpu Duron 550 based on the Spitfire core was a 32-bit x86 microprocessor developed by AMD and introduced in 2000. This model was part of the first series of the Duron family. Designed based on AMD's K7 (a Thunderbird-derivative) on a 180 nm process, this MPU operated at 550 MHz with a bus capable of 200 MT/s with a typical TDP of 25.4W.

Cache

Main article: K7 § Cache
Cache Info [Edit Values]
L1I$ 64 KB
"KB" is not declared as a valid unit of measurement for this property.
 		1x64 KB 2-way set associative
L1D$ 64 KB
"KB" is not declared as a valid unit of measurement for this property.
 		1x64 KB 2-way set associative
L2$ 64 KB
"KB" is not declared as a valid unit of measurement for this property.
 		1x64 KB 16-way set associative

Graphics

This SoC has no integrated graphics processing unit.

Features

Template:mpu features

  • Halt State
  • Sleep State
Retrieved from "https://en.wikichip.org/w/index.php?title=amd/duron/d550aut1b&oldid=23695"
Facts about "Duron 550 (Spitfire) - AMD"
RDF feed
base frequency550 MHz (0.55 GHz, 550,000 kHz) +
bus rate200 MT/s (0.2 GT/s, 200,000 kT/s) +
bus speed100 MHz (0.1 GHz, 100,000 kHz) +
bus typeFSB +
clock multiplier5.5 +
core count1 +
core family6 +
core model3 +
core nameSpitfire +
core stepping0 +
core voltage1.6 V (16 dV, 160 cV, 1,600 mV) +
core voltage tolerance0.1 V +
cpuid630 +
designerAMD +
die area100 mm² (0.155 in², 1 cm², 100,000,000 µm²) +
familyDuron +
first announcedJune 5, 2000 +
first launchedJune 19, 2000 +
full page nameamd/duron/d550aut1b +
has featureHalt State + and Sleep State +
has locked clock multipliertrue +
instance ofmicroprocessor +
l1d$ description2-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +
ldateJune 19, 2000 +
manufacturerAMD +
market segmentDesktop +
max case temperature363.15 K (90 °C, 194 °F, 653.67 °R) +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max storage temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
microarchitectureK7 +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature233.15 K (-40 °C, -40 °F, 419.67 °R) +
model numberDuron 550 +
nameDuron 550 +
part numberD550AUT1B + and D0550AUT1B +
process180 nm (0.18 μm, 1.8e-4 mm) +
seriesDuron Desktop +
smp max ways1 +
tdp25.4 W (25,400 mW, 0.0341 hp, 0.0254 kW) +
technologyCMOS +
thread count1 +
transistor count25,000,000 +
word size32 bit (4 octets, 8 nibbles) +