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Difference between revisions of "intrinsity/fastmath/fastmath-3"
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(Created page with "{{intrinsity title|FastMATH 3 GHz}} The '''FastMATH 3 GHz''' was a microprocessor developed by Intrinsity operating at 3 GHz. The processor incorporates a high-performance...")
 
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{{intrinsity title|FastMATH 3 GHz}}
 
{{intrinsity title|FastMATH 3 GHz}}
 +
{{mpu
 +
| name                = FastMATH 3 GHz
 +
| no image            =
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| image              =
 +
| image size          =
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| caption            =
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| designer            = Intrinsity
 +
| manufacturer        = TSMC
 +
| model number        =
 +
| part number        =
 +
| part number 1      =
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| market              = Embedded
 +
| first announced    = 2003
 +
| first launched      = 2003
 +
| last order          =
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| last shipment      =
 +
 +
| family              = FastMATH
 +
| series              =
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| locked              =
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| frequency          = 3,000 MHz
 +
| bus type            = RapidIO
 +
| bus speed          = 500 MHz
 +
| bus rate            = 4 GT/s
 +
| clock multiplier    =
 +
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| microarch          = FashMATH
 +
| platform            =
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| chipset            =
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| core name          =
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| core family        =
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| core model          =
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| core stepping      =
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| process            = 130 nm
 +
| transistors        =
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| technology          = Dynamic CMOS
 +
| die size            =
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| word size          = 32 bit
 +
| core count          = 1
 +
| thread count        = 1
 +
| max cpus            =
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| max memory          =
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| max memory addr    =
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| electrical          = Yes
 +
| power              =
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| v core              = 1.25 V
 +
| v core tolerance    =
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| sdp                =
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| tdp                =
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| ctdp down          =
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| ctdp down frequency =
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| ctdp up            =
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| ctdp up frequency  =
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| temp min            =
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| temp max            =
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| tjunc min          =
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| tjunc max          =
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| tcase min          =
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| tcase max          =
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| tstorage min        =
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| tstorage max        =
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| packaging          = Yes
 +
| package 0          = CBGA-670
 +
| package 0 type      = CBGA
 +
| package 0 pins      = 670
 +
| package 0 pitch    =
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| package 0 width    =
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| package 0 length    =
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| package 0 height    =
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| socket 0            =
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| socket 0 type      =
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}}
 
The '''FastMATH 3 GHz''' was a microprocessor developed by [[Intrinsity]] operating at 3 GHz. The processor incorporates a high-performance [[MIPS]] CPU along with a powerful matrix and vector math unit.
 
The '''FastMATH 3 GHz''' was a microprocessor developed by [[Intrinsity]] operating at 3 GHz. The processor incorporates a high-performance [[MIPS]] CPU along with a powerful matrix and vector math unit.

Revision as of 15:49, 3 July 2016

Template:mpu The FastMATH 3 GHz was a microprocessor developed by Intrinsity operating at 3 GHz. The processor incorporates a high-performance MIPS CPU along with a powerful matrix and vector math unit.

Retrieved from "https://en.wikichip.org/w/index.php?title=intrinsity/fastmath/fastmath-3&oldid=22667"
Facts about "FastMATH 3 GHz - Intrinsity"
RDF feed
base frequency3,000 MHz (3 GHz, 3,000,000 kHz) +
bus rate4,000 MT/s (4 GT/s, 4,000,000 kT/s) +
bus speed500 MHz (0.5 GHz, 500,000 kHz) +
bus typeRapidIO +
core count1 +
core voltage1.25 V (12.5 dV, 125 cV, 1,250 mV) +
designerIntrinsity +
familyFastMATH +
first announced2003 +
full page nameintrinsity/fastmath/fastmath-3 +
has featureJTAG +
instance ofmicroprocessor +
l1d$ description256 blocks × 16 words/block +
l1d$ size16 KiB (16,384 B, 0.0156 MiB) +
l1i$ description256 blocks × 16 words/block +
l1i$ size16 KiB (16,384 B, 0.0156 MiB) +
l2$ description4-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
ldate2003 +
manufacturerTSMC +
market segmentEmbedded +
max memory1,024 MiB (1,048,576 KiB, 1,073,741,824 B, 1 GiB, 9.765625e-4 TiB) +
microarchitectureFashMATH +
model numberFastMATH-3 +
nameFastMATH 3 GHz +
process130 nm (0.13 μm, 1.3e-4 mm) +
technologyDynamic CMOS +
thread count1 +
word size32 bit (4 octets, 8 nibbles) +