-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Difference between revisions of "intel/microarchitectures/tiger lake"
< intel | microarchitectures
Line 4: | Line 4: | ||
| designer = Intel | | designer = Intel | ||
| manufacturer = Intel | | manufacturer = Intel | ||
− | | introduction = | + | | introduction = 2020 |
| phase-out = | | phase-out = | ||
| process = 7 nm or 10 nm | | process = 7 nm or 10 nm |
Revision as of 09:11, 30 June 2016
Edit Values | |
Tigerlake µarch | |
General Info |
Tigerlake is a planned microarchitecture by Intel as a successor to Icelake. Tigerlake is expected to be fabricated using a 7 nm or 10 nm process.