Semiconductor & Computer Engineering
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'''PipeRench''' was a research [[microprocessor]] designed at [[Carnegie Mellon University]] in the early 2000s. PipeRench was developed with a reconfigurable pipeline. This allows what would otherwise have to be implemented as specialized embedded chips to be implemented in a more generic way using PipeRench through reconfiguration. | '''PipeRench''' was a research [[microprocessor]] designed at [[Carnegie Mellon University]] in the early 2000s. PipeRench was developed with a reconfigurable pipeline. This allows what would otherwise have to be implemented as specialized embedded chips to be implemented in a more generic way using PipeRench through reconfiguration. | ||
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| + | Technology developed for this project was eventually leased to [[Rapport]] for their {{rapport|Kilocore}} architecture which eventually resulted in the {{rapport|KC256}}, a 256-core chip. | ||
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| + | == Architecture == | ||
| + | PipeRench is designed as a reconfigurable fabric. The chip breaks down each of its pipeline stages into individual ''stripes''. Each strip has a set of simple execution units (EU/PE), register files, and a interconnection network. By configuring each of the stripes using the interconnect network, it's possible to virtualize different kind of custom hardware. The ALU, for example contains additional circuitry to facilitate [[bit-slice microprocessor|bit-slicing]]. | ||
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| + | == Die Shot == | ||
| + | [[File:cmu piperench die.jpg|450px]] | ||
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| + | == Documents == | ||
| + | * Seth C. Goldstein, Herman Schmit, Mihai Budiu, Srihari Cadambi, Matt Moe, and R. Reed Taylor, "[http://repository.cmu.edu/cgi/viewcontent.cgi?article=1792&context=compsci PipeRench: A Reconfigurable Architecture and Compiler]", April 2000, Carnegie Mellon University Computer Science Department. | ||
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| + | == External links == | ||
| + | * [https://www.ece.cmu.edu/research/piperench/ Official Website] | ||
Revision as of 10:25, 22 June 2016
Template:mpu PipeRench was a research microprocessor designed at Carnegie Mellon University in the early 2000s. PipeRench was developed with a reconfigurable pipeline. This allows what would otherwise have to be implemented as specialized embedded chips to be implemented in a more generic way using PipeRench through reconfiguration.
Technology developed for this project was eventually leased to Rapport for their Kilocore architecture which eventually resulted in the KC256, a 256-core chip.
Architecture
PipeRench is designed as a reconfigurable fabric. The chip breaks down each of its pipeline stages into individual stripes. Each strip has a set of simple execution units (EU/PE), register files, and a interconnection network. By configuring each of the stripes using the interconnect network, it's possible to virtualize different kind of custom hardware. The ALU, for example contains additional circuitry to facilitate bit-slicing.
Die Shot
Documents
- Seth C. Goldstein, Herman Schmit, Mihai Budiu, Srihari Cadambi, Matt Moe, and R. Reed Taylor, "PipeRench: A Reconfigurable Architecture and Compiler", April 2000, Carnegie Mellon University Computer Science Department.