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Difference between revisions of "buffer gate"

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== Symbolic representation ==
 
== Symbolic representation ==
Buffers are typically drown on schematics using one of a standard symbol. Below are three of the commonly found standard symbols.
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Buffers are typically drawn on schematics using one of a standard symbol. Below are three of the commonly found standard symbols.
 
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Revision as of 08:35, 8 June 2016

Buffer Gate
ANSI Symbol
buffer gate (ansi).svg
Functional
buffer gate functional.gif
Truth Table
Inputs Outputs
A Q
0 0
1 1
Other Gates
Buffer TriBuffer NOT
AND OR XOR
NAND NOR XNOR
Trans AOI OAI
MAJ INH IMPLY
NIMPLY
Other Components
Plexers
MUX DEMUX Encoder
Decoder Pri-Encoder
ALU
Adder Subtractor Multiplier
Divider Shifter Rotator
MAC Comparator Negator
Memory
D latch D flip-flop SR latch
JK flip-flop T flip-flop Register
Register file SRAM Counter
ROM CAM DRAM
I/O
Shift register SIPO PISO
ADC DAC

A buffer, is a basic logic gate that passes its input, unchanged, to its output. Its behavior is the opposite of a NOT gate. The main purpose of a buffer is to regenerate the input, usually using a strong high and a strong low. A buffer has one input and one output; its output always equals its input. Buffers are also used to increase the propagation delay of circuits by driving the large capacitive loads.

Description

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A buffer is a very basic active device that generates an output identical to its input. In most technologies, a buffer is made of two inverters back-to-back. One of the many purposes for a buffer is to regenerate weak output from non-restoring logic.

Design

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Symbolic representation

Buffers are typically drawn on schematics using one of a standard symbol. Below are three of the commonly found standard symbols.

ANSI IEC DIN British
buffer gate (ansi).svg buffer gate (iec).svg buffer gate (din).svg buffer gate (british).svg

Implementations

A buffer can be implemented in variety of of technologies.

CMOS

A CMOS buffer gate with one input and one output can be realized as simply two inverters back to back - built out of just 4 gates.

The table on the right shows the states of the four transistors with the various inputs of A.

Buffer Gate by Transistor
A Q1 Q2 Q3 Q4 Q
0 1 0 0 1 0
1 0 1 1 0 1

Buffer gate cmos.png

Discrete Chips

Various buffers/drivers exist chips as well for both 7400 series and 4000 series.

7400 series chips

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4000 series chips

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The 7407 is a TTL chip with 14 pins. Two pins are used for VDD and GND, the other 12 pins are used for the 6 independent buffers. The 4050 is a CMOS Hex Buffer with 16 pins. Two pins are used for VDD and GND, 12 pins are used for the 6 independent buffers. Pins 13 and 16 are not connected. Both chips implement the expression QN = AN