From WikiChip
Difference between revisions of "amd/am486/am486dx4-120nv8t"
< amd‎ | am486

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| packaging          = Yes
 
| packaging          = Yes
−
| package             = PGA-168
+
| package 0          = CPGA-168
−
| package type       = PGA
+
| package 0 type     = CPGA
−
| package pitch       =  
+
| package 0 pins      = 168
−
| package size        = 44.069 mm x 44.069 mm x 3.56 mm
+
| package 0 pitch     = 2.286 mm
−
| socket             = Socket 1
+
| package 0 width    = 44.069 mm
−
| socket 2           = Socket 2
+
| package 0 length    = 44.069 mm
−
| socket 3           = Socket 3
+
| package 0 height    = 3.556 mm
 +
| socket 0            = Socket 1
 +
| socket 0 type      =
 +
| socket 0 2         = Socket 2
 +
| socket 0 2 type    =
 +
| socket 0 3         = Socket 3
 +
| socket 0 3 type    =
 
}}
 
}}
 
'''Am486DX2-120NV8T''' was an {{intel|80486}}-compatible microprocessor introduced by [[AMD]] in 1995 following the conclusion of the legal battle with Intel. This processor had a clock multiplier of 3 having base frequency of 120 MHz with a bus frequency of 40 MHz. This model is is a modified version of {{\\|Am486DX4-120V8T}} (and earlier {{\\|Am486DX4-120}}) that no longer included Intel's ICE microcode.
 
'''Am486DX2-120NV8T''' was an {{intel|80486}}-compatible microprocessor introduced by [[AMD]] in 1995 following the conclusion of the legal battle with Intel. This processor had a clock multiplier of 3 having base frequency of 120 MHz with a bus frequency of 40 MHz. This model is is a modified version of {{\\|Am486DX4-120V8T}} (and earlier {{\\|Am486DX4-120}}) that no longer included Intel's ICE microcode.

Revision as of 21:40, 16 May 2016

Template:mpu Am486DX2-120NV8T was an 80486-compatible microprocessor introduced by AMD in 1995 following the conclusion of the legal battle with Intel. This processor had a clock multiplier of 3 having base frequency of 120 MHz with a bus frequency of 40 MHz. This model is is a modified version of Am486DX4-120V8T (and earlier Am486DX4-120) that no longer included Intel's ICE microcode.

Cache

Main article: 80486 § Cache
Cache Info [Edit Values]
L1$ 8 KB
"KB" is not declared as a valid unit of measurement for this property.
 		1x8 KB 4-way set associative (unified, write-through policy)

Graphics

This chip had no integrated graphics processing unit.

Documents

See also

Retrieved from "https://en.wikichip.org/w/index.php?title=amd/am486/am486dx4-120nv8t&oldid=19258"
Facts about "Am486DX4-120NV8T - AMD"
RDF feed
base frequency120 MHz (0.12 GHz, 120,000 kHz) +
bus rate40 MT/s (0.04 GT/s, 40,000 kT/s) +
bus speed40 MHz (0.04 GHz, 40,000 kHz) +
bus typeFSB +
clock multiplier3 +
core count1 +
core name486DX4V +
core voltage3.3 V (33 dV, 330 cV, 3,300 mV) +
core voltage tolerance0.3 V +
designerAMD +
familyAm486 +
first launched1995 +
full page nameamd/am486/am486dx4-120nv8t +
instance ofmicroprocessor +
l1$ description4-way set associative +
l1$ size8 KiB (8,192 B, 0.00781 MiB) +
ldate1995 +
manufacturerAMD +
market segmentDesktop +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max operating temperature85 °C +
microarchitecture80486 +
min operating temperature0 °C +
model numberAm486DX4-120NV8T +
nameAm486DX4-120NV8T +
part numberA80486DX4-120NV8T +
power dissipation3.2 W (3,200 mW, 0.00429 hp, 0.0032 kW) +
process500 nm (0.5 μm, 5.0e-4 mm) +
seriesAm486DX4V +
smp max ways1 +
technologyCMOS +
word size32 bit (4 octets, 8 nibbles) +