Semiconductor & Computer Engineering
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Difference between revisions of "fairchild/9400"
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| {{fairchild|9401}} || [[CRC]] Generator/Checker | | {{fairchild|9401}} || [[CRC]] Generator/Checker | ||
| + | |- | ||
| + | | {{fairchild|9402}} || [[FIFO]] buffer (16x4-bit) | ||
|- | |- | ||
| {{fairchild|9403}} || Series/Parallel [[FIFO]] (Buffer Memory) | | {{fairchild|9403}} || Series/Parallel [[FIFO]] (Buffer Memory) | ||
| Line 37: | Line 39: | ||
| {{fairchild|9405}} || Microprocessor "ALRS" (Arithmetic Logic Register Stack) | | {{fairchild|9405}} || Microprocessor "ALRS" (Arithmetic Logic Register Stack) | ||
|- | |- | ||
| − | | {{fairchild|9406}} || Program Stack | + | | {{fairchild|9406}} || Program Stack (16x4-bit [[LIFO]]) |
|- | |- | ||
| {{fairchild|9407}} || Data Access Register | | {{fairchild|9407}} || Data Access Register | ||
|- | |- | ||
| − | | {{fairchild|9410}} || 16x4 Clocked | + | | {{fairchild|9408}} || Microprogram Sequencer |
| + | |- | ||
| + | | {{fairchild|9410}} || 16x4 Clocked RAM (16x4-bit) | ||
| + | |- | ||
| + | | {{fairchild|9414}} || Data Encryption | ||
| + | |- | ||
| + | | {{fairchild|9411}} || [[CRC]] Generator/Checker | ||
| + | |- | ||
| + | | {{fairchild|9423}} || [[FIFO]] buffer (16x4-bit) | ||
|} | |} | ||
Revision as of 01:16, 6 February 2016
| Fairchild 9400 Family | |
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| |
| Developer | Fairchild Semiconductor |
| Manufacturer | Fairchild Semiconductor |
| Type | microprocessors |
| Production | 1975 |
| Architecture | 4-bit bit-slice |
| Word size | 4-bit "-bit" is not declared as a valid unit of measurement for this property.
|
| Technology | Schottky transistor, Bipolar |
| Clock | 2.4576 MHz |
| Package | DIP24, CerDIP24 |
The 9400 Series (officially 4700 Macrologic Series Bipolar Family) was a family of 4-bit bipolar multi-chip bit-slice microprocessor designed by Fairchild Semiconductor. The series was introduced in 1975. Around the same time Fairchild introduced the 4700 series which was a similar family using bipolar technology instead.
2nd Source
This family was 2nd sourced by Signetics.
Members
| Family Members | |
|---|---|
| Part | Description |
| 9401 | CRC Generator/Checker |
| 9402 | FIFO buffer (16x4-bit) |
| 9403 | Series/Parallel FIFO (Buffer Memory) |
| 9404 | Data Path Switch (DPS) |
| 9405 | Microprocessor "ALRS" (Arithmetic Logic Register Stack) |
| 9406 | Program Stack (16x4-bit LIFO) |
| 9407 | Data Access Register |
| 9408 | Microprogram Sequencer |
| 9410 | 16x4 Clocked RAM (16x4-bit) |
| 9414 | Data Encryption |
| 9411 | CRC Generator/Checker |
| 9423 | FIFO buffer (16x4-bit) |
Architecture
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This article is still a stub and needs your attention. You can help improve this article by editing this page and adding the missing information. |
Facts about "9400 Series - Fairchild"
| designer | Fairchild Semiconductor + |
| full page name | fairchild/9400 + |
| instance of | microprocessor family + |
| main designer | Fairchild Semiconductor + |
| manufacturer | Fairchild Semiconductor + |
| name | Fairchild 9400 Family + |
| package | DIP24 + and CerDIP24 + |
| technology | Schottky transistor + and Bipolar + |