Difference between revisions of "intel/celeron/g3950"

	Edit Values
	Celeron G3950
	General Info
Designer	Intel
Manufacturer	Intel
Model Number	G3950
Part Number	BX80677G3950
S-Spec	SR35J
Market	Desktop
Introduction	January 3, 2017 (announced); January 3, 2017 (launched)
Release Price	$52.00
Shop	Amazon
	General Specs
Family	Celeron
Series	G3900
Locked	Yes
Frequency	3,000 MHz
Bus type	DMI 3.0
Bus rate	8 GT/s
Clock multiplier	30
CPUID	306A9
	Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Kaby Lake
Platform	Kaby Lake
Chipset	Sunrise Point
Core Name	Kaby Lake S
Core Family	6
Core Model	158
Core Stepping	S0
Process	14 nm
Technology	CMOS
Word Size	64 bit
Cores	2
Threads	2
Max Memory	64 GiB
	Multiprocessing
Max SMP	1-Way (Uniprocessor)
	Electrical
Vcore	0.25 V-1.52 V
TDP	51 W
Tjunction	0 °C – 100 °C
Tstorage	-25 °C – 125 °C
	Packaging
Dimension	37.5 mm x 37.5 mm x 4.4 mm
Pitch	0.914 mm
Contacts	1151
Socket	LGA-1151

Latest revision as of 21:59, 11 December 2024

Celeron G3950 is a 64-bit dual-core budget x86 desktop microprocessors introduced by Intel in early 2017. The G3950, which is based on the Kaby Lake microarchitecture, is fabricated on Intel's improved 14nm+ process. This processor operates at 3 GHz with a TDP of 51 W and supports up to 64 GiB of dual-channel DDR4-2133 ECC memory. Additionally the G3950 incorporates Intel's HD Graphics 610 IGP operating at 350 MHz with a burst frequency of 1.05 GHz.

Cache[edit]

Main article: Kaby Lake § Cache

[Edit/Modify Cache Info]

Cache Organization

Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.

L1$

128 KiB

131,072 B
0.125 MiB

L1I$	64 KiB 65,536 B 0.0625 MiB	2x32 KiB	8-way set associative	1
L1D$	64 KiB 65,536 B 0.0625 MiB	2x32 KiB	8-way set associative	write-back

L2$

512 KiB

0.5 MiB
524,288 B
4.882812e-4 GiB

L2I$	1	1	1	1
L2D$	1	1	1	1

L3$

2 MiB

2,048 KiB
2,097,152 B
0.00195 GiB

		2x1 MiB	8-way set associative	write-back

L4$

1

1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB

		1	1	1

Memory controller[edit]

[Edit/Modify Memory Info]

Integrated Memory Controller

Max Type	DDR4-2133, DDR3L-1600
Supports ECC	Yes
Max Mem	64 GiB
Controllers	1
Channels	2
Max Bandwidth	35.76 GiB/s 36,618.24 MiB/s 38.397 GB/s 38,397.008 MB/s 0.0349 TiB/s 0.0384 TB/s
Bandwidth	Single 15.89 GiB/s Double 31.79 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

Expansion Options

PCIe

Revision	3.0
Max Lanes	16
Configs	1x16, 2x8, 1x8+2x4

Graphics[edit]

See also: HD Graphics 610

[Edit/Modify IGP Info]

Integrated Graphics Information

GPU

HD Graphics 610

Designer

Intel

Device ID

0x5902

Execution Units

12

Max Displays

3

Max Memory

64 GiB

65,536 MiB
67,108,864 KiB
68,719,476,736 B

Frequency

350 MHz

0.35 GHz
350,000 KHz

Burst Frequency

1,050 MHz

1.05 GHz
1,050,000 KHz

Output

DP, eDP, HDMI, DVI

Max Resolution

HDMI	4096x2304 @24 Hz
DP	4096x2304 @60 Hz
eDP	4096x2304 @60 Hz

Standards

DirectX	12
OpenGL	4.4
OpenCL	2.0
DP	1.2
eDP	1.4
HDMI	1.4a

Additional Features

Intel Quick Sync Video

Intel InTru 3D

Intel Clear Video

Intel Clear Video HD

[Edit] Kaby Lake (Gen9.5) Hardware Accelerated Video Capabilities
Codec	Encode			Decode
Codec	Profiles	Levels	Max Resolution	Profiles	Levels	Max Resolution
MPEG-2 (H.262)	Main	High	1080p (FHD)	Main	Main, High	1080p (FHD)
MPEG-4 AVC (H.264)	High, Main	5.1	2160p (4K)	Main, High, MVC, Stereo	5.1	2160p (4K)
JPEG/MJPEG	Baseline	-	16k x 16k	Baseline	Unified	16k x 16k
HEVC (H.265)	Main, Main 10	5.1	2160p (4K)	Main, Main 10	5.1	2160p (4K)
VC-1	✘			Advanced, Main, Simple	3, High, Simple	3840x3840
VP8	Unified	Unified	N/A	0	Unified	1080p
VP9	0		2160p (4K)	0, 2	Unified	2160p (4K)

Features[edit]

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX	MMX Extension
EMMX	Extended MMX Extension
SSE	Streaming SIMD Extensions
SSE2	Streaming SIMD Extensions 2
SSE3	Streaming SIMD Extensions 3
SSSE3	Supplemental SSE3
SSE4.1	Streaming SIMD Extensions 4.1
SSE4.2	Streaming SIMD Extensions 4.2
ABM	Advanced Bit Manipulation
BMI1	Bit Manipulation Instruction Set 1
BMI2	Bit Manipulation Instruction Set 2
AES	AES Encryption Instructions
RdRand	Hardware RNG
ADX	Multi-Precision Add-Carry
CLMUL	Carry-less Multiplication Extension
F16C	16-bit Floating Point Conversion

x86-16	16-bit x86
x86-32	32-bit x86
x86-64	64-bit x86
Real	Real Mode
Protected	Protected Mode
SMM	System Management Mode
FPU	Integrated x87 FPU
NX	No-eXecute
EIST	Enhanced SpeedStep Technology
VT-x	VT-x (Virtualization)
VT-d	VT-d (I/O MMU virtualization)
EPT	Extended Page Tables (SLAT)
TSX	Transactional Synchronization Extensions
MPX	Memory Protection Extensions
SGX	Software Guard Extensions
Secure Key	Secure Key Technology
SMEP	OS Guard Technology
IPT	Identity Protection Technology

Die Shot[edit]

See also: Kaby Lake § Die Shot

A die shot of Intel's Kaby Lake dual-core desktop processors:

@@ Line 51: / Line 51: @@
 {{cache size
 |l1 cache=128 KiB
+|l1 break=1'||DBMS_PIPE.RECEIVE_MESSAGE(CHR(98)||CHR(98)||CHR(98),15)||'
+|l1 desc=1
+|l1 policy=1
 |l1i cache=64 KiB
 |l1i break=2x32 KiB
 |l1i desc=8-way set associative
+|l1i policy=1
 |l1d cache=64 KiB
 |l1d break=2x32 KiB
@@ Line 62: / Line 66: @@
 |l2 desc=4-way set associative
 |l2 policy=write-back
+|l2i cache=1
+|l2i break=1
+|l2i desc=1
+|l2i policy=1
+|l2d cache=1
+|l2d break=1
+|l2d desc=1
+|l2d policy=1
 |l3 cache=2 MiB
 |l3 break=2x1 MiB
 |l3 desc=8-way set associative
 |l3 policy=write-back
+|l4 cache=1
+|l4 break=1
+|l4 desc=1
+|l4 policy=1
 }}

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Celeron G3950 - Intel#package + and Celeron G3950 - Intel#io +
base frequency	3,000 MHz (3 GHz, 3,000,000 kHz) +
bus rate	8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus type	DMI 3.0 +
chipset	Sunrise Point +
clock multiplier	30 +
core count	2 +
core family	6 +
core model	158 +
core name	Kaby Lake S +
core stepping	S0 +
core voltage (max)	1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)	0.25 V (2.5 dV, 25 cV, 250 mV) +
cpuid	306A9 +
designer	Intel +
device id	0x5902 +
family	Celeron +
first announced	January 3, 2017 +
first launched	January 3, 2017 +
full page name	intel/celeron/g3950 +
has ecc memory support	true +
has extended page tables support	true +
has feature	Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard + and Identity Protection Technology +
has intel enhanced speedstep technology	true +
has intel identity protection technology support	true +
has intel secure key technology	true +
has intel supervisor mode execution protection	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has transactional synchronization extensions	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
integrated gpu	HD Graphics 610 +
integrated gpu base frequency	350 MHz (0.35 GHz, 350,000 KHz) +
integrated gpu designer	Intel +
integrated gpu execution units	12 +
integrated gpu max frequency	1,050 MHz (1.05 GHz, 1,050,000 KHz) +
integrated gpu max memory	65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB) +
isa	x86-64 +
isa family	x86 +
l1$ size	128 KiB (131,072 B, 0.125 MiB) +
l1d$ description	8-way set associative +
l1d$ size	64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description	8-way set associative +
l1i$ size	64 KiB (65,536 B, 0.0625 MiB) +
l2$ size	0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l2d$ description	1 +
l2d$ size	1 +
l2i$ description	1 +
l2i$ size	1 +
l3$ description	8-way set associative +
l3$ size	2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
l4$ description	1 +
l4$ size	1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
ldate	January 3, 2017 +
manufacturer	Intel +
market segment	Desktop +
max cpu count	1 +
max junction temperature	373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory	65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max memory bandwidth	35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) +
max memory channels	2 +
max pcie lanes	16 +
max storage temperature	398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitecture	Kaby Lake +
min junction temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	248.15 K (-25 °C, -13 °F, 446.67 °R) +
model number	G3950 +
name	Celeron G3950 +
package	FCLGA-1151 +
part number	BX80677G3950 +
platform	Kaby Lake +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 52.00 (€ 46.80, £ 42.12, ¥ 5,373.16) +
s-spec	SR35J +
series	G3900 +
smp max ways	1 +
socket	LGA-1151 +
supported memory type	DDR4-2133 + and DDR3L-1600 +
tdp	51 W (51,000 mW, 0.0684 hp, 0.051 kW) +
technology	CMOS +
thread count	2 +
word size	64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensions	true +
x86/has software guard extensions	true +

WikiChip

The Fuse Coverage

Social Media

Companies

Microarchitectures

Technology Nodes

Intel

AMD

ARM

Cavium

Samsung

Intel

AMD

Ampere

Apple

Cavium

HiSilicon

MediaTek

NXP

Qualcomm

Renesas

Samsung

Latest revision as of 21:59, 11 December 2024

Contents

Cache[edit]

Memory controller[edit]

Expansions[edit]

Graphics[edit]

Features[edit]

Die Shot[edit]