From WikiChip
Difference between revisions of "intel/cores/broadwell h"
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{{core | {{core | ||
|name=Broadwell H | |name=Broadwell H | ||
+ | |no image=No | ||
|image=broadwell h (front).png | |image=broadwell h (front).png | ||
+ | |image size=20 | ||
+ | |caption=1 | ||
+ | |image 2=20 | ||
+ | |image 2 size=20 | ||
+ | |caption 2=1 | ||
+ | |back image=20 | ||
+ | |back image size=https://en.wikichip.org/ | ||
|developer=Intel | |developer=Intel | ||
+ | |developer 2=1 | ||
+ | |developer 3=1 | ||
+ | |developer 4=1 | ||
|manufacturer=Intel | |manufacturer=Intel | ||
+ | |manufacturer 2=1 | ||
+ | |manufacturer 3=1 | ||
+ | |manufacturer 4=1 | ||
+ | |manufacturer 5=1 | ||
+ | |manufacturer 6=1 | ||
+ | |manufacturer 7=1 | ||
+ | |manufacturer 8=1 | ||
|first announced=June 2, 2015 | |first announced=June 2, 2015 | ||
|first launched=June 2, 2015 | |first launched=June 2, 2015 | ||
+ | |fate=1 | ||
|isa=x86-64 | |isa=x86-64 | ||
|isa family=x86 | |isa family=x86 | ||
|microarch=Broadwell | |microarch=Broadwell | ||
+ | |microarch 2=1 | ||
+ | |microarch 3=1 | ||
+ | |microarch 4=1 | ||
+ | |platform=1 | ||
+ | |chipset=1 | ||
+ | |chipset 2=1 | ||
+ | |chipset 3=1 | ||
+ | |chipset 4=1 | ||
|word=64 bit | |word=64 bit | ||
|proc=14 nm | |proc=14 nm | ||
|tech=CMOS | |tech=CMOS | ||
+ | |clock=1 | ||
+ | |clock min=1 | ||
+ | |clock max=1 | ||
+ | |package module 1=20 | ||
+ | |package module 2=20 | ||
+ | |package module 3=20 | ||
+ | |package name=lxbfYeaa | ||
+ | |package name 1=lxbfYeaa | ||
+ | |package name 2=lxbfYeaa | ||
+ | |package name 3=lxbfYeaa | ||
|predecessor=Haswell H | |predecessor=Haswell H | ||
|predecessor link=intel/cores/haswell h | |predecessor link=intel/cores/haswell h | ||
+ | |predecessor 2=1 | ||
+ | |predecessor 2 link=1 | ||
+ | |predecessor 3=1 | ||
+ | |predecessor 3 link=1 | ||
+ | |predecessor 4=1 | ||
+ | |predecessor 4 link=1 | ||
+ | |predecessor 5=1 | ||
+ | |predecessor 5 link=1 | ||
|successor=Skylake H | |successor=Skylake H | ||
|successor link=intel/cores/skylake h | |successor link=intel/cores/skylake h | ||
+ | |successor 2=4111111111111111 | ||
+ | |successor 2 link=4111111111111111 | ||
+ | |successor 3=4111111111111111 | ||
+ | |successor 3 link=4111111111111111 | ||
+ | |successor 4=4111111111111111 | ||
+ | |successor 4 link=4111111111111111 | ||
+ | |successor 5=4111111111111111 | ||
+ | |successor 5 link=4111111111111111 | ||
+ | |contemporary=1 | ||
+ | |contemporary link=1 | ||
+ | |contemporary 2=1 | ||
+ | |contemporary 2 link=1 | ||
+ | |contemporary 3=1 | ||
+ | |contemporary 3 link=1 | ||
+ | |contemporary 4=1 | ||
+ | |contemporary 4 link=1 | ||
+ | |contemporary 5=1 | ||
+ | |contemporary 5 link=1 | ||
}} | }} |
Latest revision as of 20:00, 10 December 2024
Edit Values | |
Broadwell H | |
1 | |
20 | |
1 | |
General Info | |
Designer | Intel, 1, 1, 1 |
Manufacturer | Intel, 1, 1, 1, 1, 1, 1, 1 |
Introduction | June 2, 2015 (announced) June 2, 2015 (launched) |
Fate | 1 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Broadwell, 1, 1, 1 |
Platform | 1 |
Chipset | 1, 1, 1, 1 |
Word Size | 8 octets 64 bit16 nibbles |
Process | 14 nm 0.014 μm 1.4e-5 mm |
Technology | CMOS |
Clock | 1 |
Packaging | |
Unknown package "lxbfYeaa" | |
Unknown package "lxbfYeaa" | |
Unknown package "lxbfYeaa" | |
Unknown package "lxbfYeaa" | |
20 | |
20 | |
20 | |
https://en.wikichip.org/ | |
Succession | |
Contemporary | |
1 1 1 1 1 |
Facts about "Broadwell H - Cores - Intel"
back image | File:20 + |
chipset | 1 + |
designer | Intel + and 1 + |
fate | 1 + |
first announced | June 2, 2015 + |
first launched | June 2, 2015 + |
instance of | core + |
isa | x86-64 + |
isa family | x86 + |
main image | + and File:20 + |
main image caption | 1 + |
manufacturer | Intel + and 1 + |
microarchitecture | Broadwell + and 1 + |
name | Broadwell H + |
platform | 1 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |