From WikiChip
Difference between revisions of "amd/athlon xp-m/axml0950gts3b"
< amd‎ | athlon xp-m

(Created page with "{{amd title|Athlon XP-M 950}} {{chip |name=AMD Athlon XP-M 950 |no image=yes |image= |image size= |caption= |designer=AMD |manufacturer=AMD |model number=Athlon XP-M 950 |part...")
 
(No difference)

Latest revision as of 19:20, 13 May 2023

Edit Values
AMD Athlon XP-M 950
General Info
DesignerAMD
ManufacturerAMD
Model NumberAthlon XP-M 950
Part NumberAXML0950GTS3B
MarketMobile
ShopAmazon
General Specs
FamilyAthlon XP-M
Frequency950 MHz
Bus typeFSB
Bus speed100 MHz
Bus rate200 MT/s
Clock multiplier9.5
CPUID0x681
Microarchitecture
MicroarchitectureK7
Core NameThoroughbred
Core Family6
Core Model8
Core SteppingB0
Process130 nm
Transistors37,200,000
TechnologyCMOS
Die85 mm²
11.33 mm × 7.47 mm
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore1.2 V
TDP16 W
Tjunction0 °C – 95 °C
Packaging
PackageOPGA-563, UOG 563 (FC-µOPGA)
Dimension33 mm × 33 mm
Pitch1.27 mm
Contacts563
SocketSocket 563

The Athlon XP-M 950 (OPN AXML0950GTS3B) was a 32-bit x86 microprocessor developed by AMD for thin and light mobile and value PCs, a low voltage Athlon XP-M processor in a smaller µPGA package as opposed to mainstream and desktop replacement models. It was based on the K7 microarchitecture, had a 256 KiB on die L2 cache, and operated at 950 MHz (9.5 × FSB frequency). Its 100 MHz, 64-bit front side bus supported raw data rates up to 1.6 GB/s. The processor was manufactured on a 130 nm copper process at AMD's Fab 30 in Dresden, Germany. This model may be an engineering sample since AMD did not announce or list products below 1.2 GHz.

Cache[edit]

Main article: K7 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
 2-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
 2-way set associativewrite-allocate, write-back
L2$256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
   16-way set associativevictim cache

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
3DNow!3DNow! Extension
E3DNow!Extended 3DNow! Extension
SSEStreaming SIMD Extensions
x86-1616-bit x86
x86-3232-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
PowerNow!PowerNow
Retrieved from "https://en.wikichip.org/w/index.php?title=amd/athlon_xp-m/axml0950gts3b&oldid=101768"
Facts about "Athlon XP-M 950 - AMD"
RDF feed
base frequency950 MHz (0.95 GHz, 950,000 kHz) +
bus rate200 MT/s (0.2 GT/s, 200,000 kT/s) +
bus speed100 MHz (0.1 GHz, 100,000 kHz) +
bus typeFSB +
clock multiplier9.5 +
core count1 +
core family6 +
core model8 +
core nameThoroughbred +
core steppingB0 +
core voltage1.2 V (12 dV, 120 cV, 1,200 mV) +
cpuid0x681 +
designerAMD +
die area85 mm² (0.132 in², 0.85 cm², 85,000,000 µm²) +
die length11.33 mm (1.133 cm, 0.446 in, 11,330 µm) +
die width7.47 mm (0.747 cm, 0.294 in, 7,470 µm) +
familyAthlon XP-M +
full page nameamd/athlon xp-m/axml0950gts3b +
has featurePowerNow! +
instance ofmicroprocessor +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description2-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
ldate1900 +
manufacturerAMD +
market segmentMobile +
max cpu count1 +
max junction temperature368.15 K (95 °C, 203 °F, 662.67 °R) +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
microarchitectureK7 +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model numberAthlon XP-M 950 +
nameAMD Athlon XP-M 950 +
packageOPGA-563 + and UOG 563 +
part numberAXML0950GTS3B +
process130 nm (0.13 μm, 1.3e-4 mm) +
smp max ways1 +
socketSocket 563 +
tdp16 W (16,000 mW, 0.0215 hp, 0.016 kW) +
technologyCMOS +
thread count1 +
transistor count37,200,000 +
word size32 bit (4 octets, 8 nibbles) +