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From WikiChip
Difference between revisions of "arm holdings/microarchitectures/chaberton-elp"
(Chaberton-ELP) |
|||
| Line 5: | Line 5: | ||
|designer=ARM Holdings | |designer=ARM Holdings | ||
|manufacturer=TSMC | |manufacturer=TSMC | ||
| + | |introduction=2024 | ||
|predecessor=Hunter-ELP | |predecessor=Hunter-ELP | ||
|predecessor link=arm holdings/microarchitectures/hunter-elp | |predecessor link=arm holdings/microarchitectures/hunter-elp | ||
Revision as of 13:33, 4 July 2022
| Edit Values | |
| Chaberton-ELP µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | ARM Holdings |
| Manufacturer | TSMC |
| Introduction | 2024 |
| Succession | |
| Contemporary | |
| Chaberton | |
Chaberton-ELP is the successor to the Hunter, a performance-enhanced version of the Chaberton, low-power high-performance ARM microarchitecture designed by Arm for the mobile market.
Retrieved from "https://en.wikichip.org/w/index.php?title=arm_holdings/microarchitectures/chaberton-elp&oldid=100284"
Facts about "Cortex-X5 (Chaberton-ELP) - Microarchitectures - ARM"
| codename | Chaberton-ELP + |
| designer | ARM Holdings + |
| first launched | 2024 + |
| full page name | arm holdings/microarchitectures/chaberton-elp + |
| instance of | microarchitecture + |
| manufacturer | TSMC + |
| microarchitecture type | CPU + |
| name | Chaberton-ELP + |