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Difference between revisions of "intel/microarchitectures/alder lake"
(Alder Lake is successor to Tiger Lake, it's high performance, not low power like Lakefield) |
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|process=10 nm | |process=10 nm | ||
|isa=x86-64 | |isa=x86-64 | ||
− | |predecessor= | + | |predecessor=Tiger Lake |
− | |predecessor link=intel/microarchitectures/ | + | |predecessor link=intel/microarchitectures/tiger lake |
+ | |successor=Meteor Lake | ||
+ | |successor link=intel/microarchitectures/meteor lake | ||
}} | }} | ||
− | '''Alder Lake''' ('''ADL''') is [[Intel]]'s successor to {{\\| | + | '''Alder Lake''' ('''ADL''') is [[Intel]]'s successor to {{\\|Tiger Lake}}, a [[10 nm]] [[microarchitecture]] for mainstream workstations, desktops, and mobile devices. |
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− | === Key changes from {{\\| | + | === Key changes from {{\\|Tiger Lake}}=== |
* Core | * Core | ||
** Hybrid Golden Cove(big core) & Gracemont(small core) microarchitecture | ** Hybrid Golden Cove(big core) & Gracemont(small core) microarchitecture |
Revision as of 11:55, 15 August 2020
Edit Values | |
Alder Lake µarch | |
General Info | |
Arch Type | CPU |
Designer | Intel |
Manufacturer | Intel |
Introduction | 2021 |
Process | 10 nm |
Instructions | |
ISA | x86-64 |
Succession | |
Alder Lake (ADL) is Intel's successor to Tiger Lake, a 10 nm microarchitecture for mainstream workstations, desktops, and mobile devices.
Process Technology
History
Architecture
Key changes from Tiger Lake
- Core
- Hybrid Golden Cove(big core) & Gracemont(small core) microarchitecture
Facts about "Alder Lake - Microarchitectures - Intel"
codename | Alder Lake + |
designer | Intel + |
first launched | 2021 + |
full page name | intel/microarchitectures/alder lake + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Alder Lake + |
process | 10 nm (0.01 μm, 1.0e-5 mm) + |