From WikiChip
Difference between revisions of "intel/microarchitectures/diamond rapids"
(→Key changes from {{\\|Granite Rapids}}) |
m (typo) |
||
Line 21: | Line 21: | ||
** {{\\|Golden Cove}} '''→''' {{\\|Ocean Cove}} | ** {{\\|Golden Cove}} '''→''' {{\\|Ocean Cove}} | ||
* Platform | * Platform | ||
− | ** {{intel| | + | ** {{intel|Eagle Stream|l=platform}} '''→''' {{intel|Mountain Stream|l=platform}} |
{{expand list}} | {{expand list}} |
Revision as of 00:32, 18 December 2019
Edit Values | |
Diamond Rapids µarch | |
General Info | |
Arch Type | CPU |
Designer | Intel |
Manufacturer | Intel |
Introduction | 2023 |
Process | 7 nm |
Instructions | |
ISA | x86-64 |
Succession | |
Diamond Rapids (DMR) is Intel's successor to Granite Rapids, a 7 nm microarchitecture for enthusiasts and servers.
Process Technology
Diamond Rapids is planned for Intel's 7 nm process.
Architecture
Key changes from Granite Rapids
- Core
- Platform
This list is incomplete; you can help by expanding it.
Facts about "Diamond Rapids - Microarchitectures - Intel"
codename | Diamond Rapids + |
designer | Intel + |
first launched | 2025 + |
full page name | intel/microarchitectures/diamond rapids + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Diamond Rapids + |