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Difference between revisions of "intel/xeon d/d-1557"
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'''Xeon D-1557''' is a {{arch|64}} [[dodeca-core]] [[x86]] microserver SoC introduced by [[Intel]] in early [[2016]]. The D-1557 is based on the {{intel|Broadwell|l=arch}} microarchitecture and is fabricated on their [[14 nm process]]. It operates at 1.5 GHz with a TDP of 45 W and a {{intel|turbo boost|turbo frequency}} of 2.1 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2133 memory. | '''Xeon D-1557''' is a {{arch|64}} [[dodeca-core]] [[x86]] microserver SoC introduced by [[Intel]] in early [[2016]]. The D-1557 is based on the {{intel|Broadwell|l=arch}} microarchitecture and is fabricated on their [[14 nm process]]. It operates at 1.5 GHz with a TDP of 45 W and a {{intel|turbo boost|turbo frequency}} of 2.1 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2133 memory. |
Revision as of 00:24, 1 April 2019
Edit Values | |
Xeon D-1557 | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | D-1557 |
Part Number | GG8067402570702 |
S-Spec | SR2M4 |
Market | Server, Embedded |
Introduction | February 24, 2016 (announced) February 24, 2016 (launched) |
Release Price | $694.00 (tray) |
Shop | Amazon |
General Specs | |
Family | Xeon D |
Series | D-1500 |
Locked | Yes |
Frequency | 1,500 MHz |
Turbo Frequency | 2,100 MHz (1 core) |
Bus type | DMI 2.0 |
Clock multiplier | 15 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Broadwell |
Platform | Grangeville |
Core Name | Broadwell DE |
Core Family | 6 |
Core Model | 6 |
Core Stepping | Y0 |
Process | 14 nm |
Transistors | 4,700,000,000 |
Technology | CMOS |
Die | 306.18 mm² |
Word Size | 64 bit |
Cores | 12 |
Threads | 24 |
Max Memory | 128 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 45 W |
OP Temperature | 0 °C – 108 °C |
Packaging | |
Package | FCBGA-1667 (FCBGA) |
Dimension | 37.5 mm × 37.5 mm × 3.557 mm |
Pitch | 0.7 mm |
Contacts | 1667 |
Xeon D-1557 is a 64-bit dodeca-core x86 microserver SoC introduced by Intel in early 2016. The D-1557 is based on the Broadwell microarchitecture and is fabricated on their 14 nm process. It operates at 1.5 GHz with a TDP of 45 W and a turbo frequency of 2.1 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2133 memory.
Cache
- Main article: Broadwell § Cache
Cache Info [Edit Values] | ||
L1I$ | 384 KiB 393,216 B 0.375 MiB |
12x32 KiB 8-way set associative (per core) |
L1D$ | 384 KiB 393,216 B 0.375 MiB |
12x32 KiB 8-way set associative (per core) |
L2$ | 3 MiB 3,072 KiB 3,145,728 B 0.00293 GiB |
12x256 KiB 8-way set associative (per core) |
L3$ | 18 MiB 18,432 KiB 18,874,368 B 0.0176 GiB |
12x1.5 MiB (per core) |
Graphics
This SoC has no integrated graphics processing unit.
Memory controller
Integrated Memory Controller | |
Type | DDR3L-1333, DDR3L-1600, DDR4-1600, DDR4-1867, DDR4-2133 |
Controllers | 1 |
Channels | 2 |
ECC Support | Yes |
Max memory | 128 GiB |
Expansions
Expansion Options
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Networking
Networking | |
SFI interface | Yes |
KR interface | Yes |
KR4 interface | No |
KX interface | Yes |
KX4 interface | No |
10Base-T | No |
100Base-T | No |
1000Base-T | Yes |
10GBase-T | Yes |
Features
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Facts about "Xeon D-1557 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon D-1557 - Intel#io + |
back image | + |
base frequency | 1,500 MHz (1.5 GHz, 1,500,000 kHz) + |
bus type | DMI 2.0 + |
clock multiplier | 15 + |
core count | 12 + |
core family | 6 + |
core model | 6 + |
core name | Broadwell DE + |
core stepping | Y0 + |
designer | Intel + |
die area | 306.18 mm² (0.475 in², 3.062 cm², 306,180,000 µm²) + |
family | Xeon D + |
first announced | February 24, 2016 + |
first launched | February 24, 2016 + |
full page name | intel/xeon d/d-1557 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology + and Transactional Synchronization Extensions + |
has intel enhanced speedstep technology | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has locked clock multiplier | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1d$ description | 8-way set associative + |
l1d$ size | 384 KiB (393,216 B, 0.375 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 384 KiB (393,216 B, 0.375 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) + |
l3$ size | 18 MiB (18,432 KiB, 18,874,368 B, 0.0176 GiB) + |
ldate | February 24, 2016 + |
main image | + |
manufacturer | Intel + |
market segment | Server + and Embedded + |
max cpu count | 1 + |
max memory | 131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) + |
max operating temperature | 108 °C + |
max pcie lanes | 8 + |
microarchitecture | Broadwell + |
min operating temperature | 0 °C + |
model number | D-1557 + |
name | Xeon D-1557 + |
package | FCBGA-1667 + |
part number | GG8067402570702 + |
platform | Grangeville + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 694.00 (€ 624.60, £ 562.14, ¥ 71,711.02) + |
release price (tray) | $ 694.00 (€ 624.60, £ 562.14, ¥ 71,711.02) + |
s-spec | SR2M4 + |
series | D-1500 + |
smp max ways | 1 + |
tdp | 45 W (45,000 mW, 0.0603 hp, 0.045 kW) + |
technology | CMOS + |
thread count | 24 + |
transistor count | 4,700,000,000 + |
turbo frequency (1 core) | 2,100 MHz (2.1 GHz, 2,100,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |