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Difference between revisions of "phytium/microarchitectures/mars ii"
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'''Mars II''' is the successor to {{\\|Mars I}}, an [[ARM]] server SoC microarchitecture designed by [[Phytium Technology]] for the Chinese server market. | '''Mars II''' is the successor to {{\\|Mars I}}, an [[ARM]] server SoC microarchitecture designed by [[Phytium Technology]] for the Chinese server market. | ||
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+ | == Process technology == | ||
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+ | == Architecture == | ||
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+ | == Overview == | ||
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+ | == Die == | ||
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Revision as of 18:10, 18 February 2019
Edit Values | |
Mars II µarch | |
General Info | |
Arch Type | CPU |
Designer | Phytium |
Manufacturer | TSMC |
Introduction | 2019 |
Process | 16 nm |
Core Configs | 64 |
Pipeline | |
Type | Superscalar, Pipelined |
OoOE | Yes |
Speculative | Yes |
Reg Renaming | Yes |
Instructions | |
ISA | ARMv8 |
Succession | |
Mars II is the successor to Mars I, an ARM server SoC microarchitecture designed by Phytium Technology for the Chinese server market.
Process technology
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This section is empty; you can help add the missing info by editing this page. |
Architecture
![]() |
This section is empty; you can help add the missing info by editing this page. |
Overview
![]() |
This section is empty; you can help add the missing info by editing this page. |
Die
![]() |
This section is empty; you can help add the missing info by editing this page. |
Facts about "Mars II - Microarchitectures - Phytium"
codename | Mars II + |
core count | 64 + |
designer | Phytium + |
first launched | 2019 + |
full page name | phytium/microarchitectures/mars ii + |
instance of | microarchitecture + |
instruction set architecture | ARMv8 + |
manufacturer | TSMC + |
microarchitecture type | CPU + |
name | Mars II + |
process | 16 nm (0.016 μm, 1.6e-5 mm) + |