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Difference between revisions of "arm holdings/microarchitectures/cortex-a5"
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| − | '''Cortex-A5''' is the successor to the {{armh|Cortex-A9|l=arch}}, an ultra-low power [[ARM]] [[microarchitecture]] designed by [[ARM Holdings]] for the mobile market. This microarchitecture is designed as a synthesizable [[IP core]] and is sold to other semiconductor companies to be implemented in their own chips. | + | '''Cortex-A5''' (codename '''Sparrow''') is the successor to the {{armh|Cortex-A9|l=arch}}, an ultra-low power [[ARM]] [[microarchitecture]] designed by [[ARM Holdings]] for the mobile market. This microarchitecture is designed as a synthesizable [[IP core]] and is sold to other semiconductor companies to be implemented in their own chips. |
Revision as of 19:13, 29 December 2018
| Edit Values | |
| Cortex-A5 µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | ARM Holdings |
| Manufacturer | TSMC |
| Introduction | October 22, 2009 |
| Succession | |
Cortex-A5 (codename Sparrow) is the successor to the Cortex-A9, an ultra-low power ARM microarchitecture designed by ARM Holdings for the mobile market. This microarchitecture is designed as a synthesizable IP core and is sold to other semiconductor companies to be implemented in their own chips.
Facts about "Cortex-A5 - Microarchitectures - ARM"
| codename | Cortex-A5 + |
| designer | ARM Holdings + |
| first launched | October 22, 2009 + |
| full page name | arm holdings/microarchitectures/cortex-a5 + |
| instance of | microarchitecture + |
| manufacturer | TSMC + |
| microarchitecture type | CPU + |
| name | Cortex-A5 + |