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Difference between revisions of "cambricon/mlu/mlu200"
(MLU200) |
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|chip type=neural processor | |chip type=neural processor | ||
|name=MLU200 | |name=MLU200 | ||
| + | |no image=Yes | ||
|designer=Cambricon | |designer=Cambricon | ||
|manufacturer=TSMC | |manufacturer=TSMC | ||
Latest revision as of 23:42, 26 May 2018
| Edit Values | |
| MLU200 | |
| General Info | |
| Designer | Cambricon |
| Manufacturer | TSMC |
| Model Number | MLU200 |
| Market | Server |
| Introduction | November 7, 2017 (announced) |
| General Specs | |
| Family | MLU |
| Microarchitecture | |
| ISA | MLUv100 |
| Technology | CMOS |
MLU200 is a high-performance neural processor designed by Cambricon set to be introduced sometimes in late 2018. The MLU200 is designed to perform training in addition to inference.
Facts about "MLU200 - Cambricon"
| designer | Cambricon + |
| family | MLU + |
| first announced | November 7, 2017 + |
| full page name | cambricon/mlu/mlu200 + |
| isa | MLUv100 + |
| ldate | 3000 + |
| manufacturer | TSMC + |
| market segment | Server + |
| model number | MLU200 + |
| name | MLU200 + |
| technology | CMOS + |