Semiconductor & Computer Engineering
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Difference between revisions of "intel/xeon d/d-2166nt"
| Line 49: | Line 49: | ||
|l3 desc=11-way set associative | |l3 desc=11-way set associative | ||
|l3 policy=write-back | |l3 policy=write-back | ||
| + | }} | ||
| + | |||
| + | == Memory controller == | ||
| + | {{memory controller | ||
| + | |type=DDR4-2666 | ||
| + | |ecc=Yes | ||
| + | |max mem=512 GiB | ||
| + | |controllers=2 | ||
| + | |channels=4 | ||
| + | |max bandwidth=79.47 GiB/s | ||
| + | |bandwidth schan=19.87 GiB/s | ||
| + | |bandwidth dchan=39.74 GiB/s | ||
| + | |bandwidth qchan=79.47 GiB/s | ||
}} | }} | ||
Revision as of 21:21, 1 February 2018
| Edit Values | |
| Xeon D-2166NT | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Model Number | D-2166NT |
| Market | Server, Embedded |
| Shop | Amazon |
| General Specs | |
| Family | Xeon D |
| Series | D-2000 |
| Locked | Yes |
| Microarchitecture | |
| ISA | x86-64 (x86) |
| Microarchitecture | Skylake (server) |
| Core Name | Skylake-D |
| Process | 14 nm |
| Technology | CMOS |
| Word Size | 64 bit |
| Cores | 12 |
| Threads | 24 |
| Max Memory | 512 GiB |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
Xeon D-2166NT is a 64-bit dodeca-core high-performance x86 microserver processor set to be introduced by Intel in early 2018. Fabricated on Intel's 14nm+ process based on the Skylake microarchitecture, this chip operates at ? GHz with a TDP of ? W.
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Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release. |
Cache
- Main article: Skylake § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
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Integrated Memory Controller
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Facts about "Xeon D-2166NT - Intel"
| core count | 12 + |
| core name | Skylake-D + |
| designer | Intel + |
| family | Xeon D + |
| full page name | intel/xeon d/d-2166nt + |
| has ecc memory support | true + |
| has locked clock multiplier | true + |
| instance of | microprocessor + |
| isa | x86-64 + |
| isa family | x86 + |
| l1$ size | 768 KiB (786,432 B, 0.75 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 384 KiB (393,216 B, 0.375 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 384 KiB (393,216 B, 0.375 MiB) + |
| l2$ description | 16-way set associative + |
| l2$ size | 12 MiB (12,288 KiB, 12,582,912 B, 0.0117 GiB) + |
| l3$ description | 11-way set associative + |
| l3$ size | 16.5 MiB (16,896 KiB, 17,301,504 B, 0.0161 GiB) + |
| ldate | 3000 + |
| manufacturer | Intel + |
| market segment | Server + and Embedded + |
| max cpu count | 1 + |
| max memory | 524,288 MiB (536,870,912 KiB, 549,755,813,888 B, 512 GiB, 0.5 TiB) + |
| max memory bandwidth | 79.47 GiB/s (81,377.28 MiB/s, 85.33 GB/s, 85,330.263 MB/s, 0.0776 TiB/s, 0.0853 TB/s) + |
| max memory channels | 4 + |
| microarchitecture | Skylake (server) + |
| model number | D-2166NT + |
| name | Xeon D-2166NT + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| series | D-2000 + |
| smp max ways | 1 + |
| supported memory type | DDR4-2666 + |
| technology | CMOS + |
| thread count | 24 + |
| word size | 64 bit (8 octets, 16 nibbles) + |