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Difference between revisions of "intel/xeon d/d-2191"
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| − | '''Xeon D-2191''' is a {{arch|64}} [[18-core]] high-performance [[x86]] microserver processor set to be introduced by [[Intel]] in early [[2018]]. Fabricated on Intel's [[ | + | '''Xeon D-2191''' is a {{arch|64}} [[18-core]] high-performance [[x86]] microserver processor set to be introduced by [[Intel]] in early [[2018]]. Fabricated on Intel's [[14 nm process|14nm+ process]] based on the {{intel|Skylake (server)|l=arch|Skylake microarchitecture}}, this chip operates at 1.6 GHz with a [[TDP]] of 86 W. |
{{unknown features}} | {{unknown features}} | ||
Revision as of 20:56, 1 February 2018
| Edit Values | |
| Xeon D-2191 | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Model Number | D-2191 |
| Market | Server, Embedded |
| Release Price | $2406 |
| Shop | Amazon |
| General Specs | |
| Family | Xeon D |
| Series | D-2000 |
| Locked | Yes |
| Frequency | 1,600 MHz |
| Microarchitecture | |
| ISA | x86-64 (x86) |
| Microarchitecture | Skylake (server) |
| Core Name | Skylake-D |
| Process | 14 nm |
| Technology | CMOS |
| Word Size | 64 bit |
| Cores | 18 |
| Threads | 36 |
| Max Memory | 512 GiB |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
| Electrical | |
| TDP | 86 W |
Xeon D-2191 is a 64-bit 18-core high-performance x86 microserver processor set to be introduced by Intel in early 2018. Fabricated on Intel's 14nm+ process based on the Skylake microarchitecture, this chip operates at 1.6 GHz with a TDP of 86 W.
Facts about "Xeon D-2191 - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon D-2191 - Intel#package + and Xeon D-2191 - Intel#pcie + |
| base frequency | 1,600 MHz (1.6 GHz, 1,600,000 kHz) + |
| bus links | 4 + |
| bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
| bus type | DMI 3.0 + |
| clock multiplier | 16 + |
| core count | 18 + |
| core name | Skylake DE + |
| core stepping | M1 + |
| designer | Intel + |
| die count | 2 + |
| family | Xeon D + |
| first announced | February 7, 2018 + |
| first launched | February 7, 2018 + |
| full page name | intel/xeon d/d-2191 + |
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has advanced vector extensions 512 | true + |
| has ecc memory support | true + |
| has extended page tables support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Secure Key Technology +, OS Guard + and Identity Protection Technology + |
| has intel enhanced speedstep technology | true + |
| has intel identity protection technology support | true + |
| has intel secure key technology | true + |
| has intel speed shift technology | true + |
| has intel supervisor mode execution protection | true + |
| has intel trusted execution technology | true + |
| has intel turbo boost technology 2 0 | true + |
| has intel vpro technology | true + |
| has intel vt-d technology | true + |
| has intel vt-x technology | true + |
| has locked clock multiplier | true + |
| has second level address translation support | true + |
| has simultaneous multithreading | true + |
| has transactional synchronization extensions | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| instance of | microprocessor + |
| is multi-chip package | true + |
| isa | x86-64 + |
| isa family | x86 + |
| l1$ size | 1,152 KiB (1,179,648 B, 1.125 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 576 KiB (589,824 B, 0.563 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 576 KiB (589,824 B, 0.563 MiB) + |
| l2$ description | 16-way set associative + |
| l2$ size | 18 MiB (18,432 KiB, 18,874,368 B, 0.0176 GiB) + |
| l3$ description | 11-way set associative + |
| l3$ size | 24.75 MiB (25,344 KiB, 25,952,256 B, 0.0242 GiB) + |
| ldate | February 7, 2018 + |
| main image | |
| manufacturer | Intel + |
| market segment | Server + and Embedded + |
| max cpu count | 1 + |
| max hsio lanes | 20 + |
| max memory | 524,288 MiB (536,870,912 KiB, 549,755,813,888 B, 512 GiB, 0.5 TiB) + |
| max memory bandwidth | 71.53 GiB/s (73,246.72 MiB/s, 76.805 GB/s, 76,804.753 MB/s, 0.0699 TiB/s, 0.0768 TB/s) + |
| max memory channels | 4 + |
| microarchitecture | Skylake (server) + |
| model number | D-2191 + |
| name | Xeon D-2191 + |
| number of avx-512 execution units | 1 + |
| package | FCBGA-2518 + |
| part of | Edge Server and Cloud SKUs + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| release price | $ 2,406.00 (€ 2,165.40, £ 1,948.86, ¥ 248,611.98) + |
| series | D-2000 + |
| smp max ways | 1 + |
| supported memory type | DDR4-2400 + |
| tdp | 86 W (86,000 mW, 0.115 hp, 0.086 kW) + |
| technology | CMOS + |
| thread count | 36 + |
| turbo frequency (1 core) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
| word size | 64 bit (8 octets, 16 nibbles) + |
| x86/has memory protection extensions | true + |