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Difference between revisions of "intel/cores/ice lake s"
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|predecessor=Coffee Lake R | |predecessor=Coffee Lake R | ||
| − | |predecessor link=intel/cores/ | + | |predecessor link=intel/cores/coffee lake r |
|successor=Tiger Lake S | |successor=Tiger Lake S | ||
|successor link=intel/cores/tiger lake s | |successor link=intel/cores/tiger lake s | ||
Revision as of 19:53, 1 February 2018
| Edit Values | |
| Ice Lake S | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Introduction | 2019 (announced) |
| Microarchitecture | |
| ISA | x86-64 (x86) |
| Microarchitecture | Ice Lake |
| Word Size | 8 octets 64 bit16 nibbles |
| Process | 10 nm 0.01 μm 1.0e-5 mm |
| Technology | CMOS |
| Succession | |
Ice Lake S (ICL-S) is the code name for Intel's mainstream performance line of processors based on the Ice Lake microarchitecture serving as a successor to Coffee Lake R. These chips are primarily targeted towards desktop performance to value computers, AiOs, and minis. Ice Lake S processors are fabricated on Intel's 2nd generation enhanced 10nm+ process.
Overview
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Common Features
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Ice Lake S Processors
| List of Ice Lake S-based Processors | |||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Main processor | GPU | ||||||||||||
| Model | Launched | Price | Family | Cores | Threads | L3$ | TDP | Frequency | Turbo | Max Mem | Name | Frequency | Turbo |
| Count: 0 | |||||||||||||
See also
|
• Power
• Performance | |
|
• Power
• Performance |
Facts about "Ice Lake S - Cores - Intel"
| designer | Intel + |
| first announced | 2019 + |
| instance of | core + |
| isa | x86-64 + |
| isa family | x86 + |
| manufacturer | Intel + |
| microarchitecture | Ice Lake + |
| name | Ice Lake S + |
| process | 10 nm (0.01 μm, 1.0e-5 mm) + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |